drm/xe: Stop tracking 4-tile support

The choice of Y-major tiling format (either the legacy "TileY" or the
newer "Tile4") is based on graphics IP version (12.50 and beyond have
Tile4, earlier platforms have TileY).  The tracking in xe was originally
added to allow re-using display from i915.  However as of i915 commit
4ebf43d0488f ("drm/i915: Eliminate has_4tile feature flag"), the display
code determines TileY vs Tile4 itself, so this can be removed from xe.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230817230407.909816-10-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 5575d13395feab566c2c830c79de39c4d699dd62..6e852809d3ac98274804eec4ea785401f739b67b 100644 (file)
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -221,8 +221,6 @@ struct xe_device {
                u8 force_execlist:1;
                /** @has_flat_ccs: Whether flat CCS metadata is used */
                u8 has_flat_ccs:1;
-               /** @has_4tile: Whether tile-4 tiling is supported */
-               u8 has_4tile:1;
                /** @has_llc: Device has a shared CPU+GPU last level cache */
                u8 has_llc:1;
                /** @has_range_tlb_invalidation: Has range based TLB invalidations */

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 6e31b596683e7fd455f0bb0eeafffe5ec0b7e099..32adeda3520cb106992532543fee6b273ba92d88 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -77,12 +77,6 @@ struct xe_device_desc {
 
        u8 require_force_probe:1;
        u8 is_dgfx:1;
-       /*
-        * FIXME: Xe doesn't care about presence/lack of 4tile since we can
-        * already determine that from the graphics IP version.  This flag
-        * should eventually move entirely into the display code's own logic.
-        */
-       u8 has_4tile:1;
        u8 has_llc:1;
 };
 
@@ -265,8 +259,7 @@ static const u16 dg2_g12_ids[] = { XE_DG2_G12_IDS(NOP), 0 };
                { XE_SUBPLATFORM_DG2_G11, "G11", dg2_g11_ids }, \
                { XE_SUBPLATFORM_DG2_G12, "G12", dg2_g12_ids }, \
                { } \
-       }, \
-       .has_4tile = 1
+       }
 
 static const struct xe_device_desc ats_m_desc = {
        .graphics = &graphics_xehpg,
@@ -537,7 +530,6 @@ static int xe_info_init(struct xe_device *xe,
        xe->info.is_dgfx = desc->is_dgfx;
        xe->info.graphics_name = graphics_desc->name;
        xe->info.media_name = media_desc ? media_desc->name : "none";
-       xe->info.has_4tile = desc->has_4tile;
        xe->info.has_llc = desc->has_llc;
 
        xe->info.dma_mask_size = graphics_desc->dma_mask_size;