enum hl_device_status status;
if (hdev->reset_info.in_reset) {
- if (hdev->reset_info.is_in_soft_reset)
+ if (hdev->reset_info.in_compute_reset)
status = HL_DEVICE_STATUS_IN_RESET_AFTER_DEVICE_RELEASE;
else
status = HL_DEVICE_STATUS_IN_RESET;
skip_wq_flush = !!(flags & HL_DRV_RESET_DEV_RELEASE);
delay_reset = !!(flags & HL_DRV_RESET_DELAY);
- if (!hard_reset && !hdev->asic_prop.supports_soft_reset) {
+ if (!hard_reset && !hdev->asic_prop.supports_compute_reset) {
hard_instead_soft = true;
hard_reset = true;
}
}
if (hard_instead_soft)
- dev_dbg(hdev->dev, "Doing hard-reset instead of soft-reset\n");
+ dev_dbg(hdev->dev, "Doing hard-reset instead of compute reset\n");
do_reset:
/* Re-entry of reset thread */
/* Block future CS/VM/JOB completion operations */
spin_lock(&hdev->reset_info.lock);
if (hdev->reset_info.in_reset) {
- /* We only allow scheduling of a hard reset during soft reset */
- if (hard_reset && hdev->reset_info.is_in_soft_reset)
+ /* We only allow scheduling of a hard reset during compute reset */
+ if (hard_reset && hdev->reset_info.in_compute_reset)
hdev->reset_info.hard_reset_schedule_flags = flags;
spin_unlock(&hdev->reset_info.lock);
return 0;
}
/* This still allows the completion of some KDMA ops
- * Update this before in_reset because is_in_soft_reset implies we are in reset
+ * Update this before in_reset because in_compute_reset implies we are in reset
*/
- hdev->reset_info.is_in_soft_reset = !hard_reset;
+ hdev->reset_info.in_compute_reset = !hard_reset;
hdev->reset_info.in_reset = 1;
dev_err(hdev->dev,
"Failed late init in reset after device release\n");
else
- dev_err(hdev->dev, "Failed late init after soft reset\n");
+ dev_err(hdev->dev, "Failed late init after compute reset\n");
goto out_err;
}
}
}
spin_lock(&hdev->reset_info.lock);
- hdev->reset_info.is_in_soft_reset = 0;
+ hdev->reset_info.in_compute_reset = 0;
/* Schedule hard reset only if requested and if not already in hard reset.
* We keep 'in_reset' enabled, so no other reset can go in during the hard
*/
hdev->asic_funcs->enable_events_from_fw(hdev);
} else if (!reset_upon_device_release) {
- hdev->reset_info.soft_reset_cnt++;
+ hdev->reset_info.compute_reset_cnt++;
}
if (schedule_hard_reset) {
- dev_info(hdev->dev, "Performing hard reset scheduled during soft reset\n");
+ dev_info(hdev->dev, "Performing hard reset scheduled during compute reset\n");
flags = hdev->reset_info.hard_reset_schedule_flags;
hdev->reset_info.hard_reset_schedule_flags = 0;
hdev->disabled = true;
hdev->disabled = true;
spin_lock(&hdev->reset_info.lock);
- hdev->reset_info.is_in_soft_reset = 0;
+ hdev->reset_info.in_compute_reset = 0;
if (hard_reset) {
dev_err(hdev->dev, "Failed to reset! Device is NOT usable\n");
goto again;
} else {
spin_unlock(&hdev->reset_info.lock);
- dev_err(hdev->dev, "Failed to do soft-reset\n");
- hdev->reset_info.soft_reset_cnt++;
+ dev_err(hdev->dev, "Failed to do compute reset\n");
+ hdev->reset_info.compute_reset_cnt++;
flags |= HL_DRV_RESET_HARD;
hard_reset = true;
goto again;
mutex_lock(&hdev->send_cpu_message_lock);
/* CPU-CP messages can be sent during soft-reset */
- if (hdev->disabled && !hdev->reset_info.is_in_soft_reset) {
+ if (hdev->disabled && !hdev->reset_info.in_compute_reset) {
rc = 0;
goto out;
}
/* If FW performed reset just before sending it a packet, we will get a timeout.
* This is expected behavior, hence no need for error message.
*/
- if (!hl_device_operational(hdev, NULL) && !hdev->reset_info.is_in_soft_reset)
+ if (!hl_device_operational(hdev, NULL) && !hdev->reset_info.in_compute_reset)
dev_dbg(hdev->dev, "Device CPU packet timeout (0x%x) due to FW reset\n",
tmp);
else
* false otherwise.
* @use_get_power_for_reset_history: To support backward compatibility for Goya
* and Gaudi
- * @supports_soft_reset: is soft reset supported.
+ * @supports_compute_reset: is a reset which is not a hard-reset supported by this asic.
* @allow_inference_soft_reset: true if the ASIC supports soft reset that is
* initiated by user or TDR. This is only true
* in inference ASICs, as there is no real-world
u8 dynamic_fw_load;
u8 gic_interrupts_enable;
u8 use_get_power_for_reset_history;
- u8 supports_soft_reset;
+ u8 supports_compute_reset;
u8 allow_inference_soft_reset;
u8 configurable_stop_on_err;
u8 set_max_power_on_device_init;
/**
* struct hl_reset_info - holds current device reset information.
* @lock: lock to protect critical reset flows.
- * @soft_reset_cnt: number of soft reset since the driver was loaded.
- * @hard_reset_cnt: number of hard reset since the driver was loaded.
- * @hard_reset_schedule_flags: hard reset is scheduled to after current soft reset,
+ * @compute_reset_cnt: number of compte resets since the driver was loaded.
+ * @hard_reset_cnt: number of hard resets since the driver was loaded.
+ * @hard_reset_schedule_flags: hard reset is scheduled to after current compute reset,
* here we hold the hard reset flags.
* @in_reset: is device in reset flow.
- * @is_in_soft_reset: Device is currently in soft reset process.
+ * @in_compute_reset: Device is currently in reset but not in hard-reset.
* @needs_reset: true if reset_on_lockup is false and device should be reset
* due to lockup.
* @hard_reset_pending: is there a hard reset work pending.
*/
struct hl_reset_info {
spinlock_t lock;
- u32 soft_reset_cnt;
+ u32 compute_reset_cnt;
u32 hard_reset_cnt;
u32 hard_reset_schedule_flags;
u8 in_reset;
- u8 is_in_soft_reset;
+ u8 in_compute_reset;
u8 needs_reset;
u8 hard_reset_pending;
return -EINVAL;
reset_count.hard_reset_cnt = hdev->reset_info.hard_reset_cnt;
- reset_count.soft_reset_cnt = hdev->reset_info.soft_reset_cnt;
+ reset_count.soft_reset_cnt = hdev->reset_info.compute_reset_cnt;
return copy_to_user(out, &reset_count,
min((size_t) max_size, sizeof(reset_count))) ? -EFAULT : 0;
*/
dma_rmb();
- if (hdev->disabled && !hdev->reset_info.is_in_soft_reset) {
+ if (hdev->disabled && !hdev->reset_info.in_compute_reset) {
dev_warn(hdev->dev, "Device disabled but received an EQ event\n");
goto skip_irq;
}
{
struct hl_device *hdev = dev_get_drvdata(dev);
- return sprintf(buf, "%d\n", hdev->reset_info.soft_reset_cnt);
+ return sprintf(buf, "%d\n", hdev->reset_info.compute_reset_cnt);
}
static ssize_t hard_reset_cnt_show(struct device *dev,
/* No point of asking this information again when not doing hard reset, as the device
* CPU hasn't been reset
*/
- if (hdev->reset_info.is_in_soft_reset)
+ if (hdev->reset_info.in_compute_reset)
return 0;
rc = hl_fw_cpucp_handshake(hdev, mmCPU_BOOT_DEV_STS0, mmCPU_BOOT_DEV_STS1, mmCPU_BOOT_ERR0,
hdev->supports_cb_mapping = true;
hdev->supports_wait_for_multi_cs = false;
- prop->supports_soft_reset = true;
+ prop->supports_compute_reset = true;
hdev->asic_funcs->set_pci_memory_regions(hdev);
spin_lock_init(&goya->hw_queues_lock);
hdev->supports_coresight = true;
- hdev->asic_prop.supports_soft_reset = true;
+ hdev->asic_prop.supports_compute_reset = true;
hdev->asic_prop.allow_inference_soft_reset = true;
hdev->supports_wait_for_multi_cs = false;