arm64: dts: qcom: sdm630: Add SDHCI2 node

This will enable usage of (generally) uSD cards.
While at it, add accompanying OPP table for DVFS.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-10-konrad.dybcio@somainline.org
[bjorn: Dropped "sdhci1-" prefix from opp-table node]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index a0ee2137a819fede53a64bce84452e1af4c454fe..9baaf86e6a73842ca021befc328b3eae923fcea6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1036,6 +1036,56 @@
                        status = "disabled";
                };
 
+               sdhc_2: sdhci@c084000 {
+                       compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
+                       reg = <0x0c084000 0x1000>;
+                       reg-names = "hc";
+
+                       interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq", "pwr_irq";
+
+                       bus-width = <4>;
+                       clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+                                       <&gcc GCC_SDCC2_AHB_CLK>,
+                                       <&xo_board>;
+                       clock-names = "core", "iface", "xo";
+
+                       interconnects = <&a2noc 3 &a2noc 10>,
+                                       <&gnoc 0 &cnoc 28>;
+                       operating-points-v2 = <&sdhc2_opp_table>;
+
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&sdc2_state_on>;
+                       pinctrl-1 = <&sdc2_state_off>;
+                       power-domains = <&rpmpd SDM660_VDDCX>;
+
+                       status = "disabled";
+
+                       sdhc2_opp_table: opp-table {
+                                compatible = "operating-points-v2";
+
+                                opp-50000000 {
+                                       opp-hz = /bits/ 64 <50000000>;
+                                       required-opps = <&rpmpd_opp_low_svs>;
+                                       opp-peak-kBps = <200000 140000>;
+                                       opp-avg-kBps = <130718 133320>;
+                                };
+                                opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmpd_opp_svs>;
+                                       opp-peak-kBps = <250000 160000>;
+                                       opp-avg-kBps = <196078 150000>;
+                                };
+                                opp-200000000 {
+                                       opp-hz = /bits/ 64 <200000000>;
+                                       required-opps = <&rpmpd_opp_nom>;
+                                       opp-peak-kBps = <4096000 4096000>;
+                                       opp-avg-kBps = <1338562 1338562>;
+                                };
+                       };
+               };
+
                sdhc_1: sdhci@c0c4000 {
                        compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x0c0c4000 0x1000>,