drm/amd: fix compilation issue with legacy gcc

This patch is used to fix following compilation issue with legacy gcc

error: ‘for’ loop initial declarations are only allowed in C99 mode

Signed-off-by: bobzhou <bob.zhou@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
index 2e251dcbb022cffb1b8c50b2fc86cdde9fa533d5..931f7c6446de2694a89c92e5f43306326ed9f812 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
@@ -137,8 +137,9 @@ static uint8_t get_lowest_dpia_index(struct dc_link *link)
 {
        const struct dc *dc_struct = link->dc;
        uint8_t idx = 0xFF;
+       int i;
 
-       for (int i = 0; i < MAX_PIPES * 2; ++i) {
+       for (i = 0; i < MAX_PIPES * 2; ++i) {
 
                if (!dc_struct->links[i] ||
                                dc_struct->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
@@ -165,8 +166,9 @@ static int get_host_router_total_bw(struct dc_link *link, uint8_t type)
        uint8_t idx = (link->link_index - lowest_dpia_index) / 2, idx_temp = 0;
        struct dc_link *link_temp;
        int total_bw = 0;
+       int i;
 
-       for (int i = 0; i < MAX_PIPES * 2; ++i) {
+       for (i = 0; i < MAX_PIPES * 2; ++i) {
 
                if (!dc_struct->links[i] || dc_struct->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
                        continue;
@@ -467,12 +469,13 @@ bool dpia_validate_usb4_bw(struct dc_link **link, int *bw_needed_per_dpia, uint8
        bool ret = true;
        int bw_needed_per_hr[MAX_HR_NUM] = { 0, 0 };
        uint8_t lowest_dpia_index = 0, dpia_index = 0;
+       uint8_t i;
 
        if (!num_dpias || num_dpias > MAX_DPIA_NUM)
                return ret;
 
        //Get total Host Router BW & Validate against each Host Router max BW
-       for (uint8_t i = 0; i < num_dpias; ++i) {
+       for (i = 0; i < num_dpias; ++i) {
 
                if (!link[i]->dpia_bw_alloc_config.bw_alloc_enabled)
                        continue;

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 54d36df1306fdaebcb4c4592a94f079ab22587a1..ea8f3d6fb98b3fdbd5614b34a94082a4eea9bfea 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -325,6 +325,7 @@ static int smu_v13_0_6_setup_driver_pptable(struct smu_context *smu)
        struct PPTable_t *pptable =
                (struct PPTable_t *)smu_table->driver_pptable;
        int ret;
+       int i;
 
        /* Store one-time values in driver PPTable */
        if (!pptable->Init) {
@@ -339,7 +340,7 @@ static int smu_v13_0_6_setup_driver_pptable(struct smu_context *smu)
                pptable->MinGfxclkFrequency =
                        SMUQ10_TO_UINT(metrics->MinGfxclkFrequency);
 
-               for (int i = 0; i < 4; ++i) {
+               for (i = 0; i < 4; ++i) {
                        pptable->FclkFrequencyTable[i] =
                                SMUQ10_TO_UINT(metrics->FclkFrequencyTable[i]);
                        pptable->UclkFrequencyTable[i] =
@@ -466,7 +467,7 @@ static int smu_v13_0_6_set_default_dpm_table(struct smu_context *smu)
        struct PPTable_t *pptable =
                (struct PPTable_t *)smu_table->driver_pptable;
        uint32_t gfxclkmin, gfxclkmax, levels;
-       int ret = 0, i;
+       int ret = 0, i, j;
        struct smu_v13_0_6_dpm_map dpm_map[] = {
                { SMU_SOCCLK, SMU_FEATURE_DPM_SOCCLK_BIT,
                  &dpm_context->dpm_tables.soc_table,
@@ -513,7 +514,7 @@ static int smu_v13_0_6_set_default_dpm_table(struct smu_context *smu)
                dpm_table->max = dpm_table->dpm_levels[0].value;
        }
 
-       for (int j = 0; j < ARRAY_SIZE(dpm_map); j++) {
+       for (j = 0; j < ARRAY_SIZE(dpm_map); j++) {
                dpm_table = dpm_map[j].dpm_table;
                levels = 1;
                if (smu_cmn_feature_is_enabled(smu, dpm_map[j].feature_num)) {