ARM: dts: imx6: phytec: Add eeprom pagesize

Defining the EEPROM pagesize can increase the write speed significantly.
Set it to the pagesize stated in the EEPROM's datasheet for
phyCORE-i.MX 6UL, phyCORE-i.MX 6 and phyFLEX-i.MX 6.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d518528577580260b55149707bfc7be439dbdd24..7a1e53195785b3e2d1c6a13ec0cb2c432625c40f 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -117,6 +117,7 @@
 
        som_eeprom: eeprom@50 {
                compatible = "catalyst,24c32", "atmel,24c32";
+               pagesize = <32>;
                reg = <0x50>;
        };
 

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
index a3f4e8f6cc9e2e55050bb52881f415266c41d870..a80aa08a37cb7f02b381eeae3807ff18086dda2c 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -85,6 +85,7 @@
 
        eeprom@50 {
                compatible = "st,24c32", "atmel,24c32";
+               pagesize = <32>;
                reg = <0x50>;
        };
 

diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
index 88f631c8fabbe6d0b42893127e1eff63e56962f5..19a062635ff613d32c646c45b2cc460cf2a4ef82 100644 (file)
--- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
@@ -75,6 +75,7 @@
 
        eeprom@52 {
                compatible = "catalyst,24c32", "atmel,24c32";
+               pagesize = <32>;
                reg = <0x52>;
        };
 };