crypto: qat - configure arbiter mapping based on engines enabled

The hardware specific function adf_get_arbiter_mapping() modifies
the static array thrd_to_arb_map to disable mappings for AEs
that are disabled. This static array is used for each device
of the same type. If the ae mask is not identical for all devices
of the same type then the arbiter mapping returned by
adf_get_arbiter_mapping() may be wrong.

This patch fixes this problem by ensuring the static arbiter
mapping is unchanged and the device arbiter mapping is re-calculated
each time based on the static mapping.

Signed-off-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.c
index 344bfae45bff8e5f525b3ef15f803658793afe56..6a9be01fdf33c2bb176d41e2e723ec338589ea50 100644 (file)
--- a/drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.c
+++ b/drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.c
@@ -19,7 +19,7 @@ static struct adf_fw_config adf_4xxx_fw_config[] = {
 };
 
 /* Worker thread to service arbiter mappings */
-static u32 thrd_to_arb_map[] = {
+static const u32 thrd_to_arb_map[ADF_4XXX_MAX_ACCELENGINES] = {
        0x5555555, 0x5555555, 0x5555555, 0x5555555,
        0xAAAAAAA, 0xAAAAAAA, 0xAAAAAAA, 0xAAAAAAA,
        0x0
@@ -119,17 +119,9 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_1;
 }
 
-static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev,
-                                   u32 const **arb_map_config)
+static const u32 *adf_get_arbiter_mapping(void)
 {
-       struct adf_hw_device_data *hw_device = accel_dev->hw_device;
-       unsigned long ae_mask = hw_device->ae_mask;
-       int i;
-
-       for_each_clear_bit(i, &ae_mask, ADF_4XXX_MAX_ACCELENGINES)
-               thrd_to_arb_map[i] = 0;
-
-       *arb_map_config = thrd_to_arb_map;
+       return thrd_to_arb_map;
 }
 
 static void get_arb_info(struct arb_info *arb_info)

diff --git a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
index eb45f1b1ae3ebe630e42e506d155af184c499544..f5990d042c9a15dce7bcafdccfef2d6ac85bcf42 100644 (file)
--- a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
+++ b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
@@ -7,8 +7,8 @@
 #include "adf_c3xxx_hw_data.h"
 #include "icp_qat_hw.h"
 
-/* Worker thread to service arbiter mappings based on dev SKUs */
-static const u32 thrd_to_arb_map_6_me_sku[] = {
+/* Worker thread to service arbiter mappings */
+static const u32 thrd_to_arb_map[ADF_C3XXX_MAX_ACCELENGINES] = {
        0x12222AAA, 0x11222AAA, 0x12222AAA,
        0x11222AAA, 0x12222AAA, 0x11222AAA
 };
@@ -101,18 +101,9 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_UNKNOWN;
 }
 
-static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev,
-                                   u32 const **arb_map_config)
+static const u32 *adf_get_arbiter_mapping(void)
 {
-       switch (accel_dev->accel_pci_dev.sku) {
-       case DEV_SKU_4:
-               *arb_map_config = thrd_to_arb_map_6_me_sku;
-               break;
-       default:
-               dev_err(&GET_DEV(accel_dev),
-                       "The configuration doesn't match any SKU");
-               *arb_map_config = NULL;
-       }
+       return thrd_to_arb_map;
 }
 
 static u32 get_pf2vf_offset(u32 i)

diff --git a/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
index babdffbcb846f8a92f163d0b9b84e26065644c86..cadcf12884c8b4f517f1fd6fcd3f0f08bcb46e51 100644 (file)
--- a/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
+++ b/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
@@ -7,13 +7,8 @@
 #include "adf_c62x_hw_data.h"
 #include "icp_qat_hw.h"
 
-/* Worker thread to service arbiter mappings based on dev SKUs */
-static const u32 thrd_to_arb_map_8_me_sku[] = {
-       0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA,
-       0x11222AAA, 0x12222AAA, 0x11222AAA, 0, 0
-};
-
-static const u32 thrd_to_arb_map_10_me_sku[] = {
+/* Worker thread to service arbiter mappings */
+static const u32 thrd_to_arb_map[ADF_C62X_MAX_ACCELENGINES] = {
        0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA,
        0x11222AAA, 0x12222AAA, 0x11222AAA, 0x12222AAA, 0x11222AAA
 };
@@ -108,21 +103,9 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_UNKNOWN;
 }
 
-static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev,
-                                   u32 const **arb_map_config)
-{
-       switch (accel_dev->accel_pci_dev.sku) {
-       case DEV_SKU_2:
-               *arb_map_config = thrd_to_arb_map_8_me_sku;
-               break;
-       case DEV_SKU_4:
-               *arb_map_config = thrd_to_arb_map_10_me_sku;
-               break;
-       default:
-               dev_err(&GET_DEV(accel_dev),
-                       "The configuration doesn't match any SKU");
-               *arb_map_config = NULL;
-       }
+static const u32 *adf_get_arbiter_mapping(void)
+{
+       return thrd_to_arb_map;
 }
 
 static u32 get_pf2vf_offset(u32 i)

diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h
index c46a5805b294072c5370fd8051500aa63d35dd3b..5527344546e5e6b3011e9819153b14e6499637ae 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_accel_devices.h
+++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h
@@ -168,8 +168,7 @@ struct adf_hw_device_data {
        int (*send_admin_init)(struct adf_accel_dev *accel_dev);
        int (*init_arb)(struct adf_accel_dev *accel_dev);
        void (*exit_arb)(struct adf_accel_dev *accel_dev);
-       void (*get_arb_mapping)(struct adf_accel_dev *accel_dev,
-                               const u32 **cfg);
+       const u32 *(*get_arb_mapping)(void);
        void (*disable_iov)(struct adf_accel_dev *accel_dev);
        void (*configure_iov_threads)(struct adf_accel_dev *accel_dev,
                                      bool enable);

diff --git a/drivers/crypto/qat/qat_common/adf_hw_arbiter.c b/drivers/crypto/qat/qat_common/adf_hw_arbiter.c
index 9f5240d9488bf628e0f0fa42bc82b8aee11b1f38..64e4596a24f400fdf8c6de52514ff6bf2bef701b 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_hw_arbiter.c
+++ b/drivers/crypto/qat/qat_common/adf_hw_arbiter.c
@@ -19,6 +19,7 @@ int adf_init_arb(struct adf_accel_dev *accel_dev)
 {
        struct adf_hw_device_data *hw_data = accel_dev->hw_device;
        void __iomem *csr = accel_dev->transport->banks[0].csr_addr;
+       unsigned long ae_mask = hw_data->ae_mask;
        u32 arb_off, wt_off, arb_cfg;
        const u32 *thd_2_arb_cfg;
        struct arb_info info;
@@ -35,12 +36,9 @@ int adf_init_arb(struct adf_accel_dev *accel_dev)
                WRITE_CSR_ARB_SARCONFIG(csr, arb_off, arb, arb_cfg);
 
        /* Map worker threads to service arbiters */
-       hw_data->get_arb_mapping(accel_dev, &thd_2_arb_cfg);
+       thd_2_arb_cfg = hw_data->get_arb_mapping();
 
-       if (!thd_2_arb_cfg)
-               return -EFAULT;
-
-       for (i = 0; i < hw_data->num_engines; i++)
+       for_each_set_bit(i, &ae_mask, hw_data->num_engines)
                WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, thd_2_arb_cfg[i]);
 
        return 0;

diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
index 1e83d9397b116b4fd132d213f12e0cac4468e79e..7dd7cd6c3ef84bd5887e9f8687acc8fe787b151d 100644 (file)
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
@@ -7,14 +7,8 @@
 #include "adf_dh895xcc_hw_data.h"
 #include "icp_qat_hw.h"
 
-/* Worker thread to service arbiter mappings based on dev SKUs */
-static const u32 thrd_to_arb_map_sku4[] = {
-       0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666,
-       0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222,
-       0x00000000, 0x00000000, 0x00000000, 0x00000000
-};
-
-static const u32 thrd_to_arb_map_sku6[] = {
+/* Worker thread to service arbiter mappings */
+static const u32 thrd_to_arb_map[ADF_DH895XCC_MAX_ACCELENGINES] = {
        0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666,
        0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222,
        0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222
@@ -127,23 +121,9 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_UNKNOWN;
 }
 
-static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev,
-                                   u32 const **arb_map_config)
+static const u32 *adf_get_arbiter_mapping(void)
 {
-       switch (accel_dev->accel_pci_dev.sku) {
-       case DEV_SKU_1:
-               *arb_map_config = thrd_to_arb_map_sku4;
-               break;
-
-       case DEV_SKU_2:
-       case DEV_SKU_4:
-               *arb_map_config = thrd_to_arb_map_sku6;
-               break;
-       default:
-               dev_err(&GET_DEV(accel_dev),
-                       "The configuration doesn't match any SKU");
-               *arb_map_config = NULL;
-       }
+       return thrd_to_arb_map;
 }
 
 static u32 get_pf2vf_offset(u32 i)