LoongArch: dts: DeviceTree for Loongson-2K0500

Add DeviceTree file for Loongson-2K0500 processor, which integrates one
64-bit 2-issue superscalar LA264 processor core.

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile
index 1e24cdb5180aff1af7298300668bb0533b945500..89c9758bba7f19a18b5cdd77da413d9c5c8ecd2c 100644 (file)
--- a/arch/loongarch/boot/dts/Makefile
+++ b/arch/loongarch/boot/dts/Makefile
@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+dtb-y = loongson-2k0500-ref.dtb
+
 obj-$(CONFIG_BUILTIN_DTB)      += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))

diff --git a/arch/loongarch/boot/dts/loongson-2k0500-ref.dts b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts
new file mode 100644 (file)
index 0000000..b38071a
--- /dev/null
+++ b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0500.dtsi"
+
+/ {
+       compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
+       model = "Loongson-2K0500 Reference Board";
+
+       aliases {
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@200000 {
+               device_type = "memory";
+               reg = <0x0 0x00200000 0x0 0x0ee00000>,
+                     <0x0 0x90000000 0x0 0x60000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x2000000>;
+                       linux,cma-default;
+               };
+       };
+};
+
+&gmac0 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       bus_id = <0x0>;
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       bus_id = <0x1>;
+};
+
+&i2c0 {
+       status = "okay";
+
+       #address-cells = <1>;
+       #size-cells = <0>;
+       eeprom@57{
+               compatible = "atmel,24c16";
+               reg = <0x57>;
+               pagesize = <16>;
+       };
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&rtc0 {
+       status = "okay";
+};

diff --git a/arch/loongarch/boot/dts/loongson-2k0500.dtsi b/arch/loongarch/boot/dts/loongson-2k0500.dtsi
new file mode 100644 (file)
index 0000000..444779c
--- /dev/null
+++ b/arch/loongarch/boot/dts/loongson-2k0500.dtsi
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Loongson Technology Corporation Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       compatible = "loongson,la264";
+                       device_type = "cpu";
+                       reg = <0x0>;
+                       clocks = <&cpu_clk>;
+               };
+       };
+
+       cpu_clk: cpu-clk {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <500000000>;
+       };
+
+       cpuintc: interrupt-controller {
+               compatible = "loongson,cpu-interrupt-controller";
+               #interrupt-cells = <1>;
+               interrupt-controller;
+       };
+
+       bus@10000000 {
+               compatible = "simple-bus";
+               ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
+                        <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
+                        <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
+                        <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
+                        <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+
+               isa@16400000 {
+                       compatible = "isa";
+                       #size-cells = <1>;
+                       #address-cells = <2>;
+                       ranges = <1 0x0 0x0 0x16400000 0x4000>;
+               };
+
+               liointc0: interrupt-controller@1fe11400 {
+                       compatible = "loongson,liointc-2.0";
+                       reg = <0x0 0x1fe11400 0x0 0x40>,
+                             <0x0 0x1fe11040 0x0 0x8>;
+                       reg-names = "main", "isr0";
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       interrupt-parent = <&cpuintc>;
+                       interrupts = <2>;
+                       interrupt-names = "int0";
+
+                       loongson,parent_int_map = <0xffffffff>, /* int0 */
+                                                 <0x00000000>, /* int1 */
+                                                 <0x00000000>, /* int2 */
+                                                 <0x00000000>; /* int3 */
+               };
+
+               liointc1: interrupt-controller@1fe11440 {
+                       compatible = "loongson,liointc-2.0";
+                       reg = <0x0 0x1fe11440 0x0 0x40>,
+                             <0x0 0x1fe11048 0x0 0x8>;
+                       reg-names = "main", "isr0";
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       interrupt-parent = <&cpuintc>;
+                       interrupts = <4>;
+                       interrupt-names = "int2";
+
+                       loongson,parent_int_map = <0x00000000>, /* int0 */
+                                                 <0x00000000>, /* int1 */
+                                                 <0xffffffff>, /* int2 */
+                                                 <0x00000000>; /* int3 */
+               };
+
+               eiointc: interrupt-controller@1fe11600 {
+                       compatible = "loongson,ls2k0500-eiointc";
+                       reg = <0x0 0x1fe11600 0x0 0xea00>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&cpuintc>;
+                       interrupts = <3>;
+               };
+
+               gmac0: ethernet@1f020000 {
+                       compatible = "snps,dwmac-3.70a";
+                       reg = <0x0 0x1f020000 0x0 0x10000>;
+                       interrupt-parent = <&liointc0>;
+                       interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       status = "disabled";
+               };
+
+               gmac1: ethernet@1f030000 {
+                       compatible = "snps,dwmac-3.70a";
+                       reg = <0x0 0x1f030000 0x0 0x10000>;
+                       interrupt-parent = <&liointc0>;
+                       interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       status = "disabled";
+               };
+
+               sata: sata@1f040000 {
+                       compatible = "snps,spear-ahci";
+                       reg = <0x0 0x1f040000 0x0 0x10000>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <75>;
+                       status = "disabled";
+               };
+
+               ehci0: usb@1f050000 {
+                       compatible = "generic-ehci";
+                       reg = <0x0 0x1f050000 0x0 0x8000>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <71>;
+                       status = "disabled";
+               };
+
+               ohci0: usb@1f058000 {
+                       compatible = "generic-ohci";
+                       reg = <0x0 0x1f058000 0x0 0x8000>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <72>;
+                       status = "disabled";
+               };
+
+               uart0: serial@1ff40800 {
+                       compatible = "ns16550a";
+                       reg = <0x0 0x1ff40800 0x0 0x10>;
+                       clock-frequency = <100000000>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <2>;
+                       no-loopback-test;
+                       status = "disabled";
+               };
+
+               i2c0: i2c@1ff48000 {
+                       compatible = "loongson,ls2k-i2c";
+                       reg = <0x0 0x1ff48000 0x0 0x0800>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <14>;
+                       status = "disabled";
+               };
+
+               i2c@1ff48800 {
+                       compatible = "loongson,ls2k-i2c";
+                       reg = <0x0 0x1ff48800 0x0 0x0800>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <15>;
+                       status = "disabled";
+               };
+
+               i2c@1ff49000 {
+                       compatible = "loongson,ls2k-i2c";
+                       reg = <0x0 0x1ff49000 0x0 0x0800>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <16>;
+                       status = "disabled";
+               };
+
+               i2c@1ff49800 {
+                       compatible = "loongson,ls2k-i2c";
+                       reg = <0x0 0x1ff49800 0x0 0x0800>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <17>;
+                       status = "disabled";
+               };
+
+               i2c@1ff4a000 {
+                       compatible = "loongson,ls2k-i2c";
+                       reg = <0x0 0x1ff4a000 0x0 0x0800>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <18>;
+                       status = "disabled";
+               };
+
+               i2c@1ff4a800 {
+                       compatible = "loongson,ls2k-i2c";
+                       reg = <0x0 0x1ff4a800 0x0 0x0800>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <19>;
+                       status = "disabled";
+               };
+
+               pmc: power-management@1ff6c000 {
+                       compatible = "loongson,ls2k0500-pmc", "syscon";
+                       reg = <0x0 0x1ff6c000 0x0 0x58>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <56>;
+                       loongson,suspend-address = <0x0 0x1c000500>;
+
+                       syscon-reboot {
+                               compatible = "syscon-reboot";
+                               offset = <0x30>;
+                               mask = <0x1>;
+                       };
+
+                       syscon-poweroff {
+                               compatible = "syscon-poweroff";
+                               regmap = <&pmc>;
+                               offset = <0x14>;
+                               mask = <0x3c00>;
+                               value = <0x3c00>;
+                       };
+               };
+
+               rtc0: rtc@1ff6c100 {
+                       compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc";
+                       reg = <0x0 0x1ff6c100 0x0 0x100>;
+                       interrupt-parent = <&eiointc>;
+                       interrupts = <35>;
+                       status = "disabled";
+               };
+
+               pcie@1a000000 {
+                       compatible = "loongson,ls2k-pci";
+                       reg = <0x0 0x1a000000 0x0 0x02000000>,
+                             <0xfe 0x0 0x0 0x20000000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       bus-range = <0x0 0x5>;
+                       ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>,
+                                <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
+
+                       pcie@0,0 {
+                               reg = <0x0000 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
+                               interrupt-parent = <&eiointc>;
+                               #interrupt-cells = <1>;
+                               interrupt-map-mask = <0x0 0x0 0x0 0x0>;
+                               interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>;
+                               ranges;
+                       };
+
+                       pcie@1,0 {
+                               reg = <0x0800 0x0 0x0 0x0 0x0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               device_type = "pci";
+                               interrupt-parent = <&eiointc>;
+                               #interrupt-cells = <1>;
+                               interrupt-map-mask = <0x0 0x0 0x0 0x0>;
+                               interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>;
+                               ranges;
+                       };
+               };
+       };
+};