arm64: dts: qcom: sm8650: Fix UFS PHY clocks

QMP PHY used in SM8650 requires 3 clocks:

* ref - 19.2MHz reference clock from RPMh
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from TCSR

Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-17-58a49d2f4605@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index f5dbccd4cd022a7cfff3eaa1f55ade2133bfd993..62e6ae93a9a87d1129c8795752e4a5253aaa169b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -2489,10 +2489,12 @@
                        compatible = "qcom,sm8650-qmp-ufs-phy";
                        reg = <0 0x01d80000 0 0x2000>;
 
-                       clocks = <&tcsr TCSR_UFS_CLKREF_EN>,
-                                <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>,
+                                <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
+                                <&tcsr TCSR_UFS_CLKREF_EN>;
                        clock-names = "ref",
-                                     "ref_aux";
+                                     "ref_aux",
+                                     "qref";
 
                        resets = <&ufs_mem_hc 0>;
                        reset-names = "ufsphy";