ARM: dts: artpec: disable Accelerator Coherency Port
authorNiklas Cassel <niklas.cassel@axis.com>
Wed, 21 Feb 2018 08:59:53 +0000 (09:59 +0100)
committerArnd Bergmann <arnd@arndb.de>
Tue, 6 Mar 2018 16:39:50 +0000 (17:39 +0100)
Accesses via 0x80000000 go through the ACP instead of using the DDR
directly.

Unfortunately the ACP has proven to be the cause of complete system
hangs. Disabling the ACP makes these problems go away.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/artpec6.dtsi

index 2ed11773048d2e6a0f2d62112ed378c9572367bf..d9776a97d8fff62bbcaa5c3cee818606ebb95468 100644 (file)
                #address-cells = <0x1>;
                #size-cells = <0x1>;
                ranges;
-               dma-ranges = <0x80000000 0x00000000 0x40000000>;
-               dma-coherent;
+               dma-ranges;
 
                ethernet: ethernet@f8010000 {
                        clock-names = "phy_ref_clk", "apb_pclk";