drm/i915: Fix PSF GV point mask when SAGV is not possible

Don't just mask off all the PSF GV points when SAGV gets disabled.
This should in fact cause the Pcode to reject the request since
at least one PSF point must remain enabled at all times.

Cc: stable@vger.kernel.org
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Fixes: 192fbfb76744 ("drm/i915: Implement PSF GV point support")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220309164948.10671-7-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index ad1564ca7269cd00bd0ee423ddfa9ea2c8fd94ef..adf58c58513bb8dc150e4c97e001c0f9a4cec66d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -992,7 +992,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
         * cause.
         */
        if (!intel_can_enable_sagv(dev_priv, new_bw_state)) {
-               allowed_points = BIT(max_bw_point);
+               allowed_points &= ADLS_PSF_PT_MASK;
+               allowed_points |= BIT(max_bw_point);
                drm_dbg_kms(&dev_priv->drm, "No SAGV, using single QGV point %d\n",
                            max_bw_point);
        }