ARM: dts: dra7: add remaining PRM instances

Add remaining PRM instances for the dra7 SoC. Additionally enable the
genpd support for them.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 4e1bbc0198eb7f6e1a0db7de486b3c753b09ebfd..07d19bba144352ed118a6b67ea8b3c7604633be5 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1031,53 +1031,129 @@
 #include "dra7xx-clocks.dtsi"
 
 &prm {
+       prm_mpu: prm@300 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x300 0x100>;
+               #power-domain-cells = <0>;
+       };
+
        prm_dsp1: prm@400 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x400 0x100>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
        };
 
        prm_ipu: prm@500 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x500 0x100>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_coreaon: prm@628 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x628 0xd8>;
+               #power-domain-cells = <0>;
        };
 
        prm_core: prm@700 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x700 0x100>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
        };
 
        prm_iva: prm@f00 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0xf00 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_cam: prm@1000 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1000 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_dss: prm@1100 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1100 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_gpu: prm@1200 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1200 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_l3init: prm@1300 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1300 0x100>;
+               #reset-cells = <1>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_l4per: prm@1400 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1400 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_custefuse: prm@1600 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1600 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_wkupaon: prm@1724 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1724 0x100>;
+               #power-domain-cells = <0>;
        };
 
        prm_dsp2: prm@1b00 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x1b00 0x40>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
        };
 
        prm_eve1: prm@1b40 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x1b40 0x40>;
+               #power-domain-cells = <0>;
        };
 
        prm_eve2: prm@1b80 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x1b80 0x40>;
+               #power-domain-cells = <0>;
        };
 
        prm_eve3: prm@1bc0 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x1bc0 0x40>;
+               #power-domain-cells = <0>;
        };
 
        prm_eve4: prm@1c00 {
                compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
                reg = <0x1c00 0x60>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_rtc: prm@1c60 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1c60 0x20>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_vpe: prm@1c80 {
+               compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1c80 0x80>;
+               #power-domain-cells = <0>;
        };
 };