wcn36xx: Add 802.11ac MCS rates

This commit incorporates the 802.11ac table defined in downstream into
upstream wcn36xx.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200829033846.2167619-5-bryan.odonoghue@linaro.org

diff --git a/drivers/net/wireless/ath/wcn36xx/txrx.c b/drivers/net/wireless/ath/wcn36xx/txrx.c
index 820505619f66cf63ba566b0bb9ceab6f38e0f137..90924f6106ee5b6d7a670037a5252a48bad4efb4 100644 (file)
--- a/drivers/net/wireless/ath/wcn36xx/txrx.c
+++ b/drivers/net/wireless/ath/wcn36xx/txrx.c
@@ -114,7 +114,114 @@ static const struct wcn36xx_rate wcn36xx_rate_table[] = {
        { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
        { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
 
-       /* TODO: AC rates */
+       /* 11ac reserved indices */
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 20 MHz 800ns GI MCS 0-8 */
+       {   65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+       {  780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 },
+
+       /* 11ac reserved indices */
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 20 MHz 400ns SGI MCS 6-8 */
+       {  655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
+       {  722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
+       {  866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
+
+       /* 11ac reserved indices */
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 40 MHz 800ns GI MCS 0-9 */
+       {  135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       {  270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       {  405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       {  540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       {  810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+       { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 },
+
+       /* 11ac reserved indices */
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 40 MHz 400ns SGI MCS 5-7 */
+       { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac reserved index */
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 40 MHz 400ns SGI MCS 5-7 */
+       { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac reserved index */
+       { 1350, 6, RX_ENC_HT,  RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 80 MHz 800ns GI MCS 0-7 */
+       {  292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       {  585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       {  877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80},
+
+       /* 11 ac reserved index */
+       { 1350, 6, RX_ENC_HT,  RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 80 MHz 800 ns GI MCS 8-9 */
+       { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80},
+       { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80},
+
+       /* 11 ac reserved indices */
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+       { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
+       { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
+       { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
+
+       /* 11ac reserved index */
+       { 1350, 6, RX_ENC_HT,  RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
+
+       /* 11ac 80 MHz 400ns SGI MCS 8-9 */
+       { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
+       { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
 };
 
 int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)