ASoC: Intel: sof_cs42l42: rename BT offload quirk
authorBrent Lu <brent.lu@intel.com>
Mon, 25 Mar 2024 22:10:44 +0000 (17:10 -0500)
committerMark Brown <broonie@kernel.org>
Mon, 25 Mar 2024 22:44:54 +0000 (22:44 +0000)
Rename the quirk in preparation for future changes: common quriks will
be defined and handled in board helper module.

Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Brent Lu <brent.lu@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://msgid.link/r/20240325221059.206042-7-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/boards/sof_cs42l42.c

index 323b86c42ef954ea397fd630867208ba5208cf3c..330d596b2eb6d2f631772a18a08d657ef9c9f7c8 100644 (file)
@@ -34,7 +34,7 @@
 #define SOF_CS42L42_NUM_HDMIDEV_MASK           (GENMASK(9, 7))
 #define SOF_CS42L42_NUM_HDMIDEV(quirk) \
        (((quirk) << SOF_CS42L42_NUM_HDMIDEV_SHIFT) & SOF_CS42L42_NUM_HDMIDEV_MASK)
-#define SOF_BT_OFFLOAD_PRESENT                 BIT(25)
+#define SOF_CS42L42_BT_OFFLOAD_PRESENT         BIT(25)
 #define SOF_CS42L42_SSP_BT_SHIFT               26
 #define SOF_CS42L42_SSP_BT_MASK                        (GENMASK(28, 26))
 #define SOF_CS42L42_SSP_BT(quirk)      \
@@ -268,7 +268,7 @@ static int sof_audio_probe(struct platform_device *pdev)
 
        ctx->ssp_codec = sof_cs42l42_quirk & SOF_CS42L42_SSP_CODEC_MASK;
 
-       if (sof_cs42l42_quirk & SOF_BT_OFFLOAD_PRESENT)
+       if (sof_cs42l42_quirk & SOF_CS42L42_BT_OFFLOAD_PRESENT)
                ctx->bt_offload_present = true;
 
        /* update dai_link */
@@ -306,7 +306,7 @@ static const struct platform_device_id board_ids[] = {
                .driver_data = (kernel_ulong_t)(SOF_CS42L42_SSP_CODEC(0) |
                                SOF_CS42L42_SSP_AMP(1) |
                                SOF_CS42L42_NUM_HDMIDEV(4) |
-                               SOF_BT_OFFLOAD_PRESENT |
+                               SOF_CS42L42_BT_OFFLOAD_PRESENT |
                                SOF_CS42L42_SSP_BT(2)),
        },
        { }