arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 2 Jul 2020 15:51:44 +0000 (17:51 +0200)
committerKrzysztof Kozlowski <krzk@kernel.org>
Fri, 3 Jul 2020 18:00:14 +0000 (20:00 +0200)
The ARM PMU node is described enough with first compatible so remove the
arm,armv8-pmuv3 to fix dtschema warnings like:

    arm-pmu: compatible: Additional items are not allowed ('arm,armv8-pmuv3' was unexpected)
    arm-pmu: compatible: ['arm,cortex-a57-pmu', 'arm,armv8-pmuv3'] is too long

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
arch/arm64/boot/dts/exynos/exynos5433.dtsi
arch/arm64/boot/dts/exynos/exynos7.dtsi

index 6721966140f4eb6f3b16c46ea4b243cbd901a969..8ced37d20fdbb19bca24a068e563f73c6aba6b31 100644 (file)
@@ -24,7 +24,7 @@
        interrupt-parent = <&gic>;
 
        arm_a53_pmu {
-               compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
+               compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
@@ -33,7 +33,7 @@
        };
 
        arm_a57_pmu {
-               compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
+               compatible = "arm,cortex-a57-pmu";
                interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
index e83ecf0267302b2e8a1ed2b8c9cdad80443aa56e..3f82eeb2c58fc74f8fc3b333b840c0c982478a4b 100644 (file)
@@ -29,7 +29,7 @@
        };
 
        arm-pmu {
-               compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
+               compatible = "arm,cortex-a57-pmu";
                interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,