arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tue, 14 Mar 2023 08:04:33 +0000 (13:34 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 15 Mar 2023 22:17:21 +0000 (15:17 -0700)
The LLCC block has several banks each with a different base address
and holes in between. So it is not a correct approach to cover these
banks with a single offset/size. Instead, the individual bank's base
address needs to be specified in devicetree with the exact size.

On SC7180, there is only one LLCC bank available. So let's just pass that
as "llcc0_base".

Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-5-manivannan.sadhasivam@linaro.org
arch/arm64/boot/dts/qcom/sc7180.dtsi

index 53f0076f20f6223e704205c1e3ae6e98bf311bc5..fb84aa480d91bfafe5c1f4a076524936182d1365 100644 (file)
                system-cache-controller@9200000 {
                        compatible = "qcom,sc7180-llcc";
                        reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>;
-                       reg-names = "llcc_base", "llcc_broadcast_base";
+                       reg-names = "llcc0_base", "llcc_broadcast_base";
                        interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
                };