arm64: zynqmp: Setup clock for DP and DPDMA

Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/807e22371394222f728ff7d6b190a96a12145439.1683034376.git.michal.simek@amd.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index 681885c9bcbb0a8e6181771e21f35d6abf3ad9f0..581221fdadf13b58ee57b2732e0b5e44c8deffbc 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -248,10 +248,14 @@
 
 &zynqmp_dpdma {
        clocks = <&zynqmp_clk DPDMA_REF>;
+       assigned-clocks = <&zynqmp_clk DPDMA_REF>; /* apll */
 };
 
 &zynqmp_dpsub {
        clocks = <&zynqmp_clk TOPSW_LSBUS>,
                 <&zynqmp_clk DP_AUDIO_REF>,
                 <&zynqmp_clk DP_VIDEO_REF>;
+       assigned-clocks = <&zynqmp_clk DP_STC_REF>,
+                         <&zynqmp_clk DP_AUDIO_REF>,
+                         <&zynqmp_clk DP_VIDEO_REF>;  /* rpll, rpll, vpll */
 };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index 85bf276fb52dcc127d1704bb1ea43ad1a1763c60..42ff4450d8a1040c408908482bda3683d60dd9fe 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
@@ -98,10 +98,12 @@
        status = "disabled";
        phy-names = "dp-phy0", "dp-phy1";
        phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
+       assigned-clock-rates = <27000000>, <25000000>, <300000000>;
 };
 
 &zynqmp_dpdma {
        status = "okay";
+       assigned-clock-rates = <600000000>;
 };
 
 &usb0 {

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index bf8f2a94be251040eecff0d9c8d623aa2c6c6673..ed57b4e44c98954d29fbf85f56e1eb6d5c092f87 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
@@ -79,10 +79,12 @@
        status = "disabled";
        phy-names = "dp-phy0", "dp-phy1";
        phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
+       assigned-clock-rates = <27000000>, <25000000>, <300000000>;
 };
 
 &zynqmp_dpdma {
        status = "okay";
+       assigned-clock-rates = <600000000>;
 };
 
 &usb0 {