crypto: qat - fix apply custom thread-service mapping for dc service
authorShashank Gupta <shashank.gupta@intel.com>
Mon, 6 Mar 2023 16:09:23 +0000 (11:09 -0500)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 17 Mar 2023 03:09:19 +0000 (11:09 +0800)
The thread to arbiter mapping for 4xxx devices does not allow to
achieve optimal performance for the compression service as it makes
all the engines to compete for the same resources.

Update the logic so that a custom optimal mapping is used for the
compression service.

Signed-off-by: Shashank Gupta <shashank.gupta@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.c
drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
drivers/crypto/qat/qat_common/adf_accel_devices.h
drivers/crypto/qat/qat_common/adf_hw_arbiter.c
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c

index 2fb904800145e556c2ee4ee70427ab7aac6280ff..7324b86a4f40edec47e44282b6742d69fda82e5d 100644 (file)
@@ -41,12 +41,18 @@ static struct adf_fw_config adf_402xx_fw_dc_config[] = {
 };
 
 /* Worker thread to service arbiter mappings */
-static const u32 thrd_to_arb_map[ADF_4XXX_MAX_ACCELENGINES] = {
+static const u32 thrd_to_arb_map_cy[ADF_4XXX_MAX_ACCELENGINES] = {
        0x5555555, 0x5555555, 0x5555555, 0x5555555,
        0xAAAAAAA, 0xAAAAAAA, 0xAAAAAAA, 0xAAAAAAA,
        0x0
 };
 
+static const u32 thrd_to_arb_map_dc[ADF_4XXX_MAX_ACCELENGINES] = {
+       0x000000FF, 0x000000FF, 0x000000FF, 0x000000FF,
+       0x000000FF, 0x000000FF, 0x000000FF, 0x000000FF,
+       0x0
+};
+
 static struct adf_hw_device_class adf_4xxx_class = {
        .name = ADF_4XXX_DEVICE_NAME,
        .type = DEV_4XXX,
@@ -218,9 +224,16 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_1;
 }
 
-static const u32 *adf_get_arbiter_mapping(void)
+static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)
 {
-       return thrd_to_arb_map;
+       switch (get_service_enabled(accel_dev)) {
+       case SVC_CY:
+               return thrd_to_arb_map_cy;
+       case SVC_DC:
+               return thrd_to_arb_map_dc;
+       }
+
+       return NULL;
 }
 
 static void get_arb_info(struct arb_info *arb_info)
index c55c51a07677d907f6f47710eccb2b8ef24e338b..475643654e64cd73aeb7b5ddff521df2b718a7bb 100644 (file)
@@ -75,7 +75,7 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_UNKNOWN;
 }
 
-static const u32 *adf_get_arbiter_mapping(void)
+static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)
 {
        return thrd_to_arb_map;
 }
index b7aa19d2fa80426e01bac03684cd6ec560b61ea3..e142707036705ed5f45eaff9f628b20769bc1d2a 100644 (file)
@@ -77,7 +77,7 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_UNKNOWN;
 }
 
-static const u32 *adf_get_arbiter_mapping(void)
+static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)
 {
        return thrd_to_arb_map;
 }
index 134fc13c2210322870a5d1b9bd49ff39c6b50c12..bd19e646089970b01cb7b1b55d0ba1f1eaf04f23 100644 (file)
@@ -190,7 +190,7 @@ struct adf_hw_device_data {
        int (*send_admin_init)(struct adf_accel_dev *accel_dev);
        int (*init_arb)(struct adf_accel_dev *accel_dev);
        void (*exit_arb)(struct adf_accel_dev *accel_dev);
-       const u32 *(*get_arb_mapping)(void);
+       const u32 *(*get_arb_mapping)(struct adf_accel_dev *accel_dev);
        int (*init_device)(struct adf_accel_dev *accel_dev);
        int (*enable_pm)(struct adf_accel_dev *accel_dev);
        bool (*handle_pm_interrupt)(struct adf_accel_dev *accel_dev);
index 64e4596a24f400fdf8c6de52514ff6bf2bef701b..da6956699246749a13b5f57079ffb74c44ffae38 100644 (file)
@@ -36,7 +36,7 @@ int adf_init_arb(struct adf_accel_dev *accel_dev)
                WRITE_CSR_ARB_SARCONFIG(csr, arb_off, arb, arb_cfg);
 
        /* Map worker threads to service arbiters */
-       thd_2_arb_cfg = hw_data->get_arb_mapping();
+       thd_2_arb_cfg = hw_data->get_arb_mapping(accel_dev);
 
        for_each_set_bit(i, &ae_mask, hw_data->num_engines)
                WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, thd_2_arb_cfg[i]);
index bc80bb475118d36dc8565bf4ca135d6d94e54ba6..1ebe0b351faede5bf56747f5f32592d4f317668a 100644 (file)
@@ -106,7 +106,7 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
        return DEV_SKU_UNKNOWN;
 }
 
-static const u32 *adf_get_arbiter_mapping(void)
+static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)
 {
        return thrd_to_arb_map;
 }