ASSERT(clk_mgr->pp_smu);
 
+       if (dc->work_arounds.skip_clock_update)
+               return;
+
        pp_smu = &clk_mgr->pp_smu->rv_funcs;
 
        display_count = clk_mgr_helper_get_active_display_cnt(dc, context);
 
                struct dc_state *context)
 {
        int j;
+       bool should_program_abm;
 
        // Stream updates
        for (j = 0; j < dc->res_pool->pipe_count; j++) {
                        }
 
                        if (stream_update->abm_level && pipe_ctx->stream_res.abm) {
-                               if (pipe_ctx->stream_res.tg->funcs->is_blanked) {
-                                       // if otg funcs defined check if blanked before programming
-                                       if (!pipe_ctx->stream_res.tg->funcs->is_blanked(pipe_ctx->stream_res.tg))
+                               should_program_abm = true;
+
+                               // if otg funcs defined check if blanked before programming
+                               if (pipe_ctx->stream_res.tg->funcs->is_blanked)
+                                       if (pipe_ctx->stream_res.tg->funcs->is_blanked(pipe_ctx->stream_res.tg))
+                                               should_program_abm = false;
+
+                               if (should_program_abm) {
+                                       if (*stream_update->abm_level == ABM_LEVEL_IMMEDIATE_DISABLE) {
+                                               pipe_ctx->stream_res.abm->funcs->set_abm_immediate_disable(pipe_ctx->stream_res.abm);
+                                       } else {
                                                pipe_ctx->stream_res.abm->funcs->set_abm_level(
                                                        pipe_ctx->stream_res.abm, stream->abm_level);
-                               } else
-                                       pipe_ctx->stream_res.abm->funcs->set_abm_level(
-                                               pipe_ctx->stream_res.abm, stream->abm_level);
+                                       }
+                               }
                        }
                }
        }
 
        int i;
 
        if (link->hpd_gpio != NULL) {
-               dal_gpio_close(link->hpd_gpio);
                dal_gpio_destroy_irq(&link->hpd_gpio);
                link->hpd_gpio = NULL;
        }
 
        struct dc_plane_cap planes[MAX_PLANES];
 };
 
-#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
 struct dc_bug_wa {
+#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
        bool no_connect_phy_config;
        bool dedcn20_305_wa;
+#endif
        bool skip_clock_update;
 };
-#endif
 
 struct dc_dcc_surface_param {
        struct dc_size surface_size;
        struct dc_config config;
        struct dc_debug_options debug;
        struct dc_bounding_box_overrides bb_overrides;
-#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
        struct dc_bug_wa work_arounds;
-#endif
        struct dc_context *ctx;
 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
        struct dc_phy_addr_space_config vm_pa_config;
 
        union stream_update_flags update_flags;
 };
 
+#define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF
+
 struct dc_stream_update {
        struct dc_stream_state *stream;
 
 
 {
        struct dce_abm *abm_dce = TO_DCE_ABM(*abm);
 
-       if (abm_dce->base.dmcu_is_running == true)
-               abm_dce->base.funcs->set_abm_immediate_disable(*abm);
-
        kfree(abm_dce);
        *abm = NULL;
 }
 
 {
        struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(*dmcu);
 
-       if (dmcu_dce->base.dmcu_state == DMCU_RUNNING)
-               dmcu_dce->base.funcs->set_psr_enable(*dmcu, false, true);
-
        kfree(dmcu_dce);
        *dmcu = NULL;
 }
 
                return;
        }
 
-       dal_gpio_close(*gpio);
-
        switch ((*gpio)->id) {
        case GPIO_ID_DDC_DATA:
                kfree((*gpio)->hw_container.ddc);
 
                return;
        }
 
-       dal_gpio_close(*mux);
        dal_gpio_destroy(mux);
        kfree(*mux);
 
                return;
        }
 
-       dal_gpio_close(*irq);
        dal_gpio_destroy(irq);
        kfree(*irq);