drm/i915: Fix FEC pipe A vs. DDI A mixup
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 2 May 2023 14:38:59 +0000 (17:38 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 13 Sep 2023 13:37:40 +0000 (16:37 +0300)
On pre-TGL FEC is a port level feature, not a transcoder
level feature, and it's DDI A which doesn't have it, not
trancoder A. Check for the correct thing when determining
whether FEC is supported or not.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230502143906.2401-5-ville.syrjala@linux.intel.com
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
drivers/gpu/drm/i915/display/intel_dp.c

index aa5f602b56fb7cba7ca130e5a708e368fd34414e..781cffeda8f0eb9c475532573f34238ca7ce5a95 100644 (file)
@@ -1357,13 +1357,13 @@ bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp)
 static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
                                         const struct intel_crtc_state *pipe_config)
 {
+       struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-       /* On TGL, FEC is supported on all Pipes */
        if (DISPLAY_VER(dev_priv) >= 12)
                return true;
 
-       if (DISPLAY_VER(dev_priv) == 11 && pipe_config->cpu_transcoder != TRANSCODER_A)
+       if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A)
                return true;
 
        return false;