Since the number of patterns that can be configured in
the HW is higher for newer chips, store the chip-specific
value in ath9k_hw_wow.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
            ah->eep_ops->get_eeprom(ah, EEP_PAPRD))
                        pCap->hw_caps |= ATH9K_HW_CAP_PAPRD;
 
+#ifdef CONFIG_ATH9K_WOW
+       if (AR_SREV_9462_20_OR_LATER(ah) || AR_SREV_9565_11_OR_LATER(ah))
+               ah->wow.max_patterns = MAX_NUM_PATTERN;
+       else
+               ah->wow.max_patterns = MAX_NUM_PATTERN_LEGACY;
+#endif
+
        return 0;
 }
 
 
 
 #define MAX_PATTERN_SIZE               256
 #define MAX_PATTERN_MASK_SIZE          32
-#define MAX_NUM_PATTERN                        8
+#define MAX_NUM_PATTERN                        16
+#define MAX_NUM_PATTERN_LEGACY         8
 #define MAX_NUM_USER_PATTERN           6 /*  deducting the disassociate and
                                              deauthenticate packets */
 
 
 struct ath9k_hw_wow {
        u32 wow_event_mask;
+       u8 max_patterns;
 };
 
 struct ath9k_hw_capabilities {