[MIPS] No need to write c0_compare in plat_timer_setup

If R4k counter was used for hpt_timer and interrupt source,
c0_hpt_timer_init() initializes the c0_compare register.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index 14c55168f1ff11d50016fa0afe25feea24443f73..b27b47cd6fb218b9a5d6951c3f6a7910ce82ac8e 100644 (file)
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -116,7 +116,6 @@ static void lasat_time_init(void)
 
 void __init plat_timer_setup(struct irqaction *irq)
 {
-       write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ);
        change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
 }
 

diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index a3c3a1d462b272f39900d9c9910ac1f1d8bde455..df2a2bd3aa5d198188e0fc3f8e1eadb167ee5dfd 100644 (file)
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -295,7 +295,4 @@ void __init plat_timer_setup(struct irqaction *irq)
        irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
        set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
 #endif
-
-        /* to generate the first timer interrupt */
-       write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
 }

diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index 30711d016fed008a7520b1341e32c0d81fbf2ccb..d3a21c741514617abb962c931188d24f0d30e9fb 100644 (file)
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -199,7 +199,4 @@ void __init plat_timer_setup(struct irqaction *irq)
        irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU;
        set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
 #endif
-
-       /* to generate the first timer interrupt */
-       write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ));
 }

diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 941c441729b0a17f24a92127deba002d702feb61..c8e49feb345b2aa2a5365f4f80339b94e9460af8 100644 (file)
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -81,18 +81,8 @@ void __init tx4927_time_init(void)
 
 void __init plat_timer_setup(struct irqaction *irq)
 {
-       u32 count;
-       u32 c1;
-       u32 c2;
-
        setup_irq(TX4927_IRQ_CPU_TIMER, irq);
 
-       /* to generate the first timer interrupt */
-       c1 = read_c0_count();
-       count = c1 + (mips_hpt_frequency / HZ);
-       write_c0_compare(count);
-       c2 = read_c0_count();
-
 #ifdef CONFIG_TOSHIBA_RBTX4927
        {
                extern void toshiba_rbtx4927_timer_setup(struct irqaction

diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
index dc87d92bb08d267a4119d96b417e9b9a4588b2db..142abf453e4079e307909130618c0927a2ac53aa 100644 (file)
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@@ -55,14 +55,5 @@ tx4938_time_init(void)
 
 void __init plat_timer_setup(struct irqaction *irq)
 {
-       u32 count;
-       u32 c1;
-       u32 c2;
-
        setup_irq(TX4938_IRQ_CPU_TIMER, irq);
-
-       c1 = read_c0_count();
-       count = c1 + (mips_hpt_frequency / HZ);
-       write_c0_compare(count);
-       c2 = read_c0_count();
 }