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target/arm: Use tcg_constant in disas_movw_imm
author
Richard Henderson
<richard.henderson@linaro.org>
Tue, 26 Apr 2022 16:30:08 +0000
(09:30 -0700)
committer
Peter Maydell
<peter.maydell@linaro.org>
Thu, 28 Apr 2022 12:35:58 +0000
(13:35 +0100)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
20220426163043
.100432-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/translate-a64.c
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diff --git
a/target/arm/translate-a64.c
b/target/arm/translate-a64.c
index 6c88772eb3274ec2002855aceeb07226b5b056d3..537eebbf1da324d0699ced18892f3f5dcb51d8ce 100644
(file)
--- a/
target/arm/translate-a64.c
+++ b/
target/arm/translate-a64.c
@@
-4419,7
+4419,6
@@
static void disas_movw_imm(DisasContext *s, uint32_t insn)
int opc = extract32(insn, 29, 2);
int pos = extract32(insn, 21, 2) << 4;
TCGv_i64 tcg_rd = cpu_reg(s, rd);
- TCGv_i64 tcg_imm;
if (!sf && (pos >= 32)) {
unallocated_encoding(s);
@@
-4439,9
+4438,7
@@
static void disas_movw_imm(DisasContext *s, uint32_t insn)
tcg_gen_movi_i64(tcg_rd, imm);
break;
case 3: /* MOVK */
- tcg_imm = tcg_const_i64(imm);
- tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_imm, pos, 16);
- tcg_temp_free_i64(tcg_imm);
+ tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_constant_i64(imm), pos, 16);
if (!sf) {
tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
}