ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
authorMarek Vasut <marex@denx.de>
Thu, 25 Mar 2021 21:45:33 +0000 (22:45 +0100)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 1 Apr 2021 09:30:01 +0000 (11:30 +0200)
Enable the CRC accelerator on all STM32MP15xx DHSOM based systems
and CRYP accelerator on all STM32MP15x[CF] DHSOM based systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dts
arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts
arch/arm/boot/dts/stm32mp157c-dhcom-picoitx.dts
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi

index 02a39132958ea957ebd2fcfbe5224421242e0e1e..b4e504f026ce73794df91994bad3256f36887a55 100644 (file)
                     "st,stm32mp153";
 };
 
+&cryp1 {
+       status = "okay";
+};
+
 &m_can1 {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&m_can1_pins_a>;
index d3b81382f97c3e2d8d330edef8e2a614d9bcae63..6dd8216c235eb574b516acdaaabb5c6d77bc1296 100644 (file)
                     "st,stm32mp157";
 };
 
+&cryp1 {
+       status = "okay";
+};
+
 &m_can1 {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&m_can1_pins_a>;
index cfb8f8a0c82d7770b79e51b3eccf7d73423b3e33..7067a860aaff8c751b523797c71549dc31d57fcf 100644 (file)
                     "st,stm32mp157";
 };
 
+&cryp1 {
+       status = "okay";
+};
+
 &m_can1 {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&m_can1_pins_a>;
index d40c8db74c6fe92a7cfc20be692349a86ae3ad82..272a1a67a9adc15adffacf85918ad319781b2421 100644 (file)
        };
 };
 
+&crc1 {
+       status = "okay";
+};
+
 &dac {
        pinctrl-names = "default";
        pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
index 803eb8bc9c85c819d296ca6f59d98411cb151229..013ae369791d761c53e8fd58f3bc3b09e1ce62c5 100644 (file)
        };
 };
 
+&crc1 {
+       status = "okay";
+};
+
 &dts {
        status = "okay";
 };