ARM: dts: imx6sl: Convert gpc to new bindings

With old bindings imx_gpc_onecell_data always sets num_domains to 2 so
the DISPMIX domain can't actually be referenced. The pd is still defined
and pm core shuts it down as "unused" so display can't work.

Fix this by converting to new gpc bindings by adding pgc nodes and
referencing the newly-defined &pu_disp domain from &lcdif.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index c64bd906ad55f97cdfe5c9b42ef526e786d3bbb0..a6b5ca48298f22106d679bf314d62b87f5f2e0d4 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -681,10 +681,36 @@
                                #interrupt-cells = <3>;
                                interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-parent = <&intc>;
-                               pu-supply = <&reg_pu>;
-                               clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
-                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
-                               #power-domain-cells = <1>;
+                               clocks = <&clks IMX6SL_CLK_IPG>;
+                               clock-names = "ipg";
+
+                               pgc {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       power-domain@0 {
+                                               reg = <0>;
+                                               #power-domain-cells = <0>;
+                                       };
+
+                                       pd_pu: power-domain@1 {
+                                               reg = <1>;
+                                               #power-domain-cells = <0>;
+                                               power-supply = <&reg_pu>;
+                                               clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
+                                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
+                                       };
+
+                                       pd_disp: power-domain@2 {
+                                               reg = <2>;
+                                               #power-domain-cells = <0>;
+                                               clocks = <&clks IMX6SL_CLK_LCDIF_AXI>,
+                                                        <&clks IMX6SL_CLK_LCDIF_PIX>,
+                                                        <&clks IMX6SL_CLK_EPDC_AXI>,
+                                                        <&clks IMX6SL_CLK_EPDC_PIX>,
+                                                        <&clks IMX6SL_CLK_PXP_AXI>;
+                                       };
+                               };
                        };
 
                        gpr: iomuxc-gpr@20e0000 {
@@ -739,6 +765,7 @@
                                         <&clks IMX6SL_CLK_DUMMY>;
                                clock-names = "pix", "axi", "disp_axi";
                                status = "disabled";
+                               power-domains = <&pd_disp>;
                        };
 
                        dcp: dcp@20fc000 {