firmware: tegra: add bpmp driver for Tegra210
authorTimo Alho <talho@nvidia.com>
Thu, 24 Jan 2019 17:03:54 +0000 (19:03 +0200)
committerThierry Reding <treding@nvidia.com>
Fri, 25 Jan 2019 14:58:47 +0000 (15:58 +0100)
This patch adds driver for Tegra210 BPMP firmware.

The BPMP is a specific processor in Tegra210 chip, which runs firmware
for assisting in entering deep low power states (suspend to ram), and
offloading DRAM memory clock scaling on some platforms.

Based on work by Sivaram Nair <sivaramn@nvidia.com>

Signed-off-by: Timo Alho <talho@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/firmware/tegra/Makefile
drivers/firmware/tegra/bpmp-private.h
drivers/firmware/tegra/bpmp-tegra210.c [new file with mode: 0644]
drivers/firmware/tegra/bpmp.c
include/soc/tegra/bpmp.h

index 559355674bca8e54b3ea51040dcf603ca9abfbf8..ba45e58f7647a6b4e387664f29f114b9da5fe66e 100644 (file)
@@ -1,4 +1,5 @@
 tegra-bpmp-y                   = bpmp.o
+tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC)        += bpmp-tegra210.o
 tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC)        += bpmp-tegra186.o
 tegra-bpmp-$(CONFIG_DEBUG_FS)  += bpmp-debugfs.o
 obj-$(CONFIG_TEGRA_BPMP)       += tegra-bpmp.o
index 6fb10f1cfb8f0ac9ef1b655482118e8f696fc758..07c3d46abb874d79f8b12dcb86137d40ba56a8e1 100644 (file)
@@ -24,5 +24,6 @@ struct tegra_bpmp_ops {
 };
 
 extern const struct tegra_bpmp_ops tegra186_bpmp_ops;
+extern const struct tegra_bpmp_ops tegra210_bpmp_ops;
 
 #endif
diff --git a/drivers/firmware/tegra/bpmp-tegra210.c b/drivers/firmware/tegra/bpmp-tegra210.c
new file mode 100644 (file)
index 0000000..ae15940
--- /dev/null
@@ -0,0 +1,243 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include <soc/tegra/bpmp.h>
+
+#include "bpmp-private.h"
+
+#define TRIGGER_OFFSET         0x000
+#define RESULT_OFFSET(id)      (0xc00 + id * 4)
+#define TRIGGER_ID_SHIFT       16
+#define TRIGGER_CMD_GET                4
+
+#define STA_OFFSET             0
+#define SET_OFFSET             4
+#define CLR_OFFSET             8
+
+#define CH_MASK(ch)    (0x3 << ((ch) * 2))
+#define SL_SIGL(ch)    (0x0 << ((ch) * 2))
+#define SL_QUED(ch)    (0x1 << ((ch) * 2))
+#define MA_FREE(ch)    (0x2 << ((ch) * 2))
+#define MA_ACKD(ch)    (0x3 << ((ch) * 2))
+
+struct tegra210_bpmp {
+       void __iomem *atomics;
+       void __iomem *arb_sema;
+       struct irq_data *tx_irq_data;
+};
+
+static u32 bpmp_channel_status(struct tegra_bpmp *bpmp, unsigned int index)
+{
+       struct tegra210_bpmp *priv = bpmp->priv;
+
+       return __raw_readl(priv->arb_sema + STA_OFFSET) & CH_MASK(index);
+}
+
+static bool tegra210_bpmp_is_response_ready(struct tegra_bpmp_channel *channel)
+{
+       unsigned int index = channel->index;
+
+       return bpmp_channel_status(channel->bpmp, index) == MA_ACKD(index);
+}
+
+static bool tegra210_bpmp_is_request_ready(struct tegra_bpmp_channel *channel)
+{
+       unsigned int index = channel->index;
+
+       return bpmp_channel_status(channel->bpmp, index) == SL_SIGL(index);
+}
+
+static bool
+tegra210_bpmp_is_request_channel_free(struct tegra_bpmp_channel *channel)
+{
+       unsigned int index = channel->index;
+
+       return bpmp_channel_status(channel->bpmp, index) == MA_FREE(index);
+}
+
+static bool
+tegra210_bpmp_is_response_channel_free(struct tegra_bpmp_channel *channel)
+{
+       unsigned int index = channel->index;
+
+       return bpmp_channel_status(channel->bpmp, index) == SL_QUED(index);
+}
+
+static int tegra210_bpmp_post_request(struct tegra_bpmp_channel *channel)
+{
+       struct tegra210_bpmp *priv = channel->bpmp->priv;
+
+       __raw_writel(CH_MASK(channel->index), priv->arb_sema + CLR_OFFSET);
+
+       return 0;
+}
+
+static int tegra210_bpmp_post_response(struct tegra_bpmp_channel *channel)
+{
+       struct tegra210_bpmp *priv = channel->bpmp->priv;
+
+       __raw_writel(MA_ACKD(channel->index), priv->arb_sema + SET_OFFSET);
+
+       return 0;
+}
+
+static int tegra210_bpmp_ack_response(struct tegra_bpmp_channel *channel)
+{
+       struct tegra210_bpmp *priv = channel->bpmp->priv;
+
+       __raw_writel(MA_ACKD(channel->index) ^ MA_FREE(channel->index),
+                    priv->arb_sema + CLR_OFFSET);
+
+       return 0;
+}
+
+static int tegra210_bpmp_ack_request(struct tegra_bpmp_channel *channel)
+{
+       struct tegra210_bpmp *priv = channel->bpmp->priv;
+
+       __raw_writel(SL_QUED(channel->index), priv->arb_sema + SET_OFFSET);
+
+       return 0;
+}
+
+static int tegra210_bpmp_ring_doorbell(struct tegra_bpmp *bpmp)
+{
+       struct tegra210_bpmp *priv = bpmp->priv;
+       struct irq_data *irq_data = priv->tx_irq_data;
+
+       /*
+        * Tegra Legacy Interrupt Controller (LIC) is used to notify BPMP of
+        * available messages
+        */
+       if (irq_data->chip->irq_retrigger)
+               return irq_data->chip->irq_retrigger(irq_data);
+
+       return -EINVAL;
+}
+
+static irqreturn_t rx_irq(int irq, void *data)
+{
+       struct tegra_bpmp *bpmp = data;
+
+       tegra_bpmp_handle_rx(bpmp);
+
+       return IRQ_HANDLED;
+}
+
+static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
+                                     struct tegra_bpmp *bpmp,
+                                     unsigned int index)
+{
+       struct tegra210_bpmp *priv = bpmp->priv;
+       u32 address;
+       void *p;
+
+       /* Retrieve channel base address from BPMP */
+       writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET,
+              priv->atomics + TRIGGER_OFFSET);
+       address = readl(priv->atomics + RESULT_OFFSET(index));
+
+       p = devm_ioremap(bpmp->dev, address, 0x80);
+       if (!p)
+               return -ENOMEM;
+
+       channel->ib = p;
+       channel->ob = p;
+       channel->index = index;
+       init_completion(&channel->completion);
+       channel->bpmp = bpmp;
+
+       return 0;
+}
+
+static int tegra210_bpmp_init(struct tegra_bpmp *bpmp)
+{
+       struct platform_device *pdev = to_platform_device(bpmp->dev);
+       struct tegra210_bpmp *priv;
+       struct resource *res;
+       unsigned int i;
+       int err;
+
+       priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+       if (!priv)
+               return -ENOMEM;
+
+       bpmp->priv = priv;
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       priv->atomics = devm_ioremap_resource(&pdev->dev, res);
+       if (IS_ERR(priv->atomics))
+               return PTR_ERR(priv->atomics);
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+       priv->arb_sema = devm_ioremap_resource(&pdev->dev, res);
+       if (IS_ERR(priv->arb_sema))
+               return PTR_ERR(priv->arb_sema);
+
+       err = tegra210_bpmp_channel_init(bpmp->tx_channel, bpmp,
+                                        bpmp->soc->channels.cpu_tx.offset);
+       if (err < 0)
+               return err;
+
+       err = tegra210_bpmp_channel_init(bpmp->rx_channel, bpmp,
+                                        bpmp->soc->channels.cpu_rx.offset);
+       if (err < 0)
+               return err;
+
+       for (i = 0; i < bpmp->threaded.count; i++) {
+               unsigned int index = bpmp->soc->channels.thread.offset + i;
+
+               err = tegra210_bpmp_channel_init(&bpmp->threaded_channels[i],
+                                                bpmp, index);
+               if (err < 0)
+                       return err;
+       }
+
+       err = platform_get_irq_byname(pdev, "tx");
+       if (err < 0) {
+               dev_err(&pdev->dev, "failed to get TX IRQ: %d\n", err);
+               return err;
+       }
+
+       priv->tx_irq_data = irq_get_irq_data(err);
+       if (!priv->tx_irq_data) {
+               dev_err(&pdev->dev, "failed to get IRQ data for TX IRQ\n");
+               return err;
+       }
+
+       err = platform_get_irq_byname(pdev, "rx");
+       if (err < 0) {
+               dev_err(&pdev->dev, "failed to get rx IRQ: %d\n", err);
+               return err;
+       }
+
+       err = devm_request_irq(&pdev->dev, err, rx_irq,
+                              IRQF_NO_SUSPEND, dev_name(&pdev->dev), bpmp);
+       if (err < 0) {
+               dev_err(&pdev->dev, "failed to request IRQ: %d\n", err);
+               return err;
+       }
+
+       return 0;
+}
+
+const struct tegra_bpmp_ops tegra210_bpmp_ops = {
+       .init = tegra210_bpmp_init,
+       .is_response_ready = tegra210_bpmp_is_response_ready,
+       .is_request_ready = tegra210_bpmp_is_request_ready,
+       .ack_response = tegra210_bpmp_ack_response,
+       .ack_request = tegra210_bpmp_ack_request,
+       .is_response_channel_free = tegra210_bpmp_is_response_channel_free,
+       .is_request_channel_free = tegra210_bpmp_is_request_channel_free,
+       .post_response = tegra210_bpmp_post_response,
+       .post_request = tegra210_bpmp_post_request,
+       .ring_doorbell = tegra210_bpmp_ring_doorbell,
+};
index 2b498deacdbc52a1505fce60455ec307e9fceb4a..8e3f79959d48b8e1c97edf58a174c81853b950ff 100644 (file)
@@ -768,17 +768,23 @@ static int tegra_bpmp_probe(struct platform_device *pdev)
        if (err < 0)
                goto free_mrq;
 
-       err = tegra_bpmp_init_clocks(bpmp);
-       if (err < 0)
-               goto free_mrq;
+       if (of_find_property(pdev->dev.of_node, "#clock-cells", NULL)) {
+               err = tegra_bpmp_init_clocks(bpmp);
+               if (err < 0)
+                       goto free_mrq;
+       }
 
-       err = tegra_bpmp_init_resets(bpmp);
-       if (err < 0)
-               goto free_mrq;
+       if (of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
+               err = tegra_bpmp_init_resets(bpmp);
+               if (err < 0)
+                       goto free_mrq;
+       }
 
-       err = tegra_bpmp_init_powergates(bpmp);
-       if (err < 0)
-               goto free_mrq;
+       if (of_find_property(pdev->dev.of_node, "#power-domain-cells", NULL)) {
+               err = tegra_bpmp_init_powergates(bpmp);
+               if (err < 0)
+                       goto free_mrq;
+       }
 
        err = tegra_bpmp_init_debugfs(bpmp);
        if (err < 0)
@@ -827,8 +833,30 @@ static const struct tegra_bpmp_soc tegra186_soc = {
        .num_resets = 193,
 };
 
+static const struct tegra_bpmp_soc tegra210_soc = {
+       .channels = {
+               .cpu_tx = {
+                       .offset = 0,
+                       .count = 1,
+                       .timeout = 60 * USEC_PER_SEC,
+               },
+               .thread = {
+                       .offset = 4,
+                       .count = 1,
+                       .timeout = 600 * USEC_PER_SEC,
+               },
+               .cpu_rx = {
+                       .offset = 8,
+                       .count = 1,
+                       .timeout = 0,
+               },
+       },
+       .ops = &tegra210_bpmp_ops,
+};
+
 static const struct of_device_id tegra_bpmp_match[] = {
        { .compatible = "nvidia,tegra186-bpmp", .data = &tegra186_soc },
+       { .compatible = "nvidia,tegra210-bpmp", .data = &tegra210_soc },
        { }
 };
 
index bdd1bd107abaa11d5ad1e4b17c492586dc8b6f4f..45960aa08f4aa18374f49866094325407dbae626 100644 (file)
@@ -50,6 +50,7 @@ struct tegra_bpmp_channel {
        struct tegra_bpmp_mb_data *ob;
        struct completion completion;
        struct tegra_ivc *ivc;
+       unsigned int index;
 };
 
 typedef void (*tegra_bpmp_mrq_handler_t)(unsigned int mrq,