drm/xe/xe2: Update render/compute context image sizes
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 11 Aug 2023 16:06:04 +0000 (09:06 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:40:24 +0000 (11:40 -0500)
The render and compute context are significantly smaller on Xe2 than on
previous platforms.

Registers:
 - Render:  3008 dwords -> 12032 bytes -> round to 3 pages
 - Compute: 1424 dwords ->  5696 bytes -> round to 2 pages

We also allocate one additional page for the HWSP, so the total
allocation sizes for render and compute are 4 and 3 pages respectively.

Bspec: 65182, 56578, 55793
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_lrc.c

index 7a7fdcdadf372a182fa738e5e0f5fbee8459319f..7c15c55964a8bb371a6b2365d874291095c43fdc 100644 (file)
@@ -37,9 +37,16 @@ size_t xe_lrc_size(struct xe_device *xe, enum xe_engine_class class)
 {
        switch (class) {
        case XE_ENGINE_CLASS_RENDER:
+               if (GRAPHICS_VER(xe) >= 20)
+                       return 4 * SZ_4K;
+               else
+                       return 14 * SZ_4K;
        case XE_ENGINE_CLASS_COMPUTE:
                /* 14 pages since graphics_ver == 11 */
-               return 14 * SZ_4K;
+               if (GRAPHICS_VER(xe) >= 20)
+                       return 3 * SZ_4K;
+               else
+                       return 14 * SZ_4K;
        default:
                WARN(1, "Unknown engine class: %d", class);
                fallthrough;