drm/amdgpu: Add MODE register to wave debug info in gfx11
authorJoseph Greathouse <Joseph.Greathouse@amd.com>
Mon, 6 Jun 2022 21:09:25 +0000 (16:09 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 8 Jun 2022 15:40:11 +0000 (11:40 -0400)
All other chips, from gfx6-gfx10, now include the MODE register at the
end of the wave debug state. This appears to have been missed in gfx11,
so this patch adds in MODE to the debug state for gfx11.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

index ca37289c644ffeab3d0730aed85f553ff0e312b1..05359df6c354865431645aa6f575f597ee45f2f3 100644 (file)
@@ -1096,6 +1096,7 @@ static void gfx_v11_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd,
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2);
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1);
        dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0);
+       dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE);
 }
 
 static void gfx_v11_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,