cxl/acpi: Fail decoder add if CXIMS for HBIG is missing

The BIOS provided CXIMS (CXL XOR Interleave Math Structure) is required
for calculating a targets position in an interleave list during region
creation. The CXL driver expects to discover a CXIMS that matches the
HBIG (Host Bridge Interleave Granularity) and stores the xormaps found
in that CXIMS for retrieval during region creation.

If there is no CXIMS for an HBIG, no maps are stored. That leads to a
NULL pointer dereference at xormap retrieval during region creation.

Add a check during ACPI probe for the case of no matching CXIMS. Emit
an error message and fail to add the decoder.

Fixes: f9db85bfec0d ("cxl/acpi: Support CXL XOR Interleave Math (CXIMS)")
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20221205002951.1788783-1-alison.schofield@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index 657ef250d848dc74730c29b405e6eeb8ca7ea186..420e322c85a11c55becdd2915cc2af3cba689836 100644 (file)
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -282,6 +282,11 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
                                                   cxl_parse_cxims, &cxims_ctx);
                        if (rc < 0)
                                goto err_xormap;
+                       if (!cxlrd->platform_data) {
+                               dev_err(dev, "No CXIMS for HBIG %u\n", ig);
+                               rc = -EINVAL;
+                               goto err_xormap;
+                       }
                }
        }
        rc = cxl_decoder_add(cxld, target_map);