arm64: dts: ti: k3-j784s4-evm: Add support for OSPI and QSPI flashes
authorApurva Nandan <a-nandan@ti.com>
Thu, 4 May 2023 08:03:05 +0000 (13:33 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Thu, 15 Jun 2023 05:35:46 +0000 (11:05 +0530)
J784S4 has S28HS512T OSPI flash connected to OSPI0 and MT25QU512A QSPI
flash connected to OSPI1, enable support for the same. Also describe
the partition information according to the offsets in the bootloader.

Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Link: https://lore.kernel.org/r/20230504080305.38986-3-a-nandan@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts

index 64b58e0d2e5d72a257a5826605ea16fc0d2f3b49..8271ac16b3193f8fb43f1ab2846866bb2a18dfb4 100644 (file)
        };
 };
 
+&wkup_pmx0 {
+       mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
+                       J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
+                       J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */
+                       J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */
+                       J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */
+                       J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */
+                       J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */
+                       J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */
+                       J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
+                       J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
+                       J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
+                       J784S4_WKUP_IOPAD(0x03c, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_CSn3.MCU_OSPI0_ECC_FAIL */
+                       J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_CSn2.MCU_OSPI0_RESET_OUT0 */
+               >;
+       };
+
+       mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
+                       J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
+                       J784S4_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
+                       J784S4_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
+                       J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
+                       J784S4_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
+                       J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
+                       J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
+               >;
+       };
+};
+
 &main_uart8 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_uart8_pins_default>;
 };
 
+&fss {
+       status = "okay";
+};
+
+&ospi0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <8>;
+               spi-rx-bus-width = <8>;
+               spi-max-frequency = <25000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <4>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "ospi.tiboot3";
+                               reg = <0x0 0x80000>;
+                       };
+
+                       partition@80000 {
+                               label = "ospi.tispl";
+                               reg = <0x80000 0x200000>;
+                       };
+
+                       partition@280000 {
+                               label = "ospi.u-boot";
+                               reg = <0x280000 0x400000>;
+                       };
+
+                       partition@680000 {
+                               label = "ospi.env";
+                               reg = <0x680000 0x40000>;
+                       };
+
+                       partition@6c0000 {
+                               label = "ospi.env.backup";
+                               reg = <0x6c0000 0x40000>;
+                       };
+
+                       partition@800000 {
+                               label = "ospi.rootfs";
+                               reg = <0x800000 0x37c0000>;
+                       };
+
+                       partition@3fc0000 {
+                               label = "ospi.phypattern";
+                               reg = <0x3fc0000 0x40000>;
+                       };
+               };
+       };
+};
+
+&ospi1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <40000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <2>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "qspi.tiboot3";
+                               reg = <0x0 0x80000>;
+                       };
+
+                       partition@80000 {
+                               label = "qspi.tispl";
+                               reg = <0x80000 0x200000>;
+                       };
+
+                       partition@280000 {
+                               label = "qspi.u-boot";
+                               reg = <0x280000 0x400000>;
+                       };
+
+                       partition@680000 {
+                               label = "qspi.env";
+                               reg = <0x680000 0x40000>;
+                       };
+
+                       partition@6c0000 {
+                               label = "qspi.env.backup";
+                               reg = <0x6c0000 0x40000>;
+                       };
+
+                       partition@800000 {
+                               label = "qspi.rootfs";
+                               reg = <0x800000 0x37c0000>;
+                       };
+
+                       partition@3fc0000 {
+                               label = "qspi.phypattern";
+                               reg = <0x3fc0000 0x40000>;
+                       };
+               };
+
+       };
+};
+
 &main_i2c0 {
        status = "okay";
        pinctrl-names = "default";