mtd: spi-nor: Enable locking for n25q128a13

As 4bit block protection patchset for some micron models are merged,
n25q128a13 also uses 4 bit Block Protection scheme, so enable locking
for it. Tested it on n25q128a13, the locking functions work well.

Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210628211729.3625017-1-jonathan.lemon@gmail.com

diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index c224e59820a1b7bb2bdb847e4e16c708f48feaf4..f3d19b716b7ba968b999970afc0a17cd6d9ca6d9 100644 (file)
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -146,7 +146,9 @@ static const struct flash_info st_parts[] = {
                              SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
                              SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
        { "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256,
-                             SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+                             SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
+                             SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
+                             SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
        { "mt25ql256a",  INFO6(0x20ba19, 0x104400, 64 * 1024,  512,
                               SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
                               SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },