* Copyright (C) 2017 Zodiac Inflight Innovations
  */
 
+#include "common.xml.h"
 #include "etnaviv_gpu.h"
 #include "etnaviv_perfmon.h"
 #include "state_hi.xml.h"
        u32 nr_domains;
 };
 
-static u32 simple_reg_read(struct etnaviv_gpu *gpu,
-       const struct etnaviv_pm_domain *domain,
-       const struct etnaviv_pm_signal *signal)
-{
-       return gpu_read(gpu, signal->data);
-}
-
 static u32 perf_reg_read(struct etnaviv_gpu *gpu,
        const struct etnaviv_pm_domain *domain,
        const struct etnaviv_pm_signal *signal)
        return value;
 }
 
+static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu,
+       const struct etnaviv_pm_domain *domain,
+       const struct etnaviv_pm_signal *signal)
+{
+       u32 reg = VIVS_HI_PROFILE_TOTAL_CYCLES;
+
+       if (gpu->identity.model == chipModel_GC880 ||
+               gpu->identity.model == chipModel_GC2000 ||
+               gpu->identity.model == chipModel_GC2100)
+               reg = VIVS_MC_PROFILE_CYCLE_COUNTER;
+
+       return gpu_read(gpu, reg);
+}
+
+static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu,
+       const struct etnaviv_pm_domain *domain,
+       const struct etnaviv_pm_signal *signal)
+{
+       u32 reg = VIVS_HI_PROFILE_IDLE_CYCLES;
+
+       if (gpu->identity.model == chipModel_GC880 ||
+               gpu->identity.model == chipModel_GC2000 ||
+               gpu->identity.model == chipModel_GC2100)
+               reg = VIVS_HI_PROFILE_TOTAL_CYCLES;
+
+       return gpu_read(gpu, reg);
+}
+
 static const struct etnaviv_pm_domain doms_3d[] = {
        {
                .name = "HI",
                .signal = (const struct etnaviv_pm_signal[]) {
                        {
                                "TOTAL_CYCLES",
-                               VIVS_HI_PROFILE_TOTAL_CYCLES,
-                               &simple_reg_read
+                               0,
+                               &hi_total_cycle_read
                        },
                        {
                                "IDLE_CYCLES",
-                               VIVS_HI_PROFILE_IDLE_CYCLES,
-                               &simple_reg_read
+                               0,
+                               &hi_total_idle_cycle_read
                        },
                        {
                                "AXI_CYCLES_READ_REQUEST_STALLED",