arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector

The schematics label it as SCIF0 debug port.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220614193005.2652-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
index 41aa8591b3b1b548429a88b20ed112a654e9bc1e..81d178e69527cad53617f7163206fa8f78008077 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
@@ -60,6 +60,11 @@
                function = "scif3";
        };
 
+       scif0_pins: scif0 {
+               groups = "scif0_data", "scif0_ctrl";
+               function = "scif0";
+       };
+
        scif_clk_pins: scif_clk {
                groups = "scif_clk";
                function = "scif_clk";
@@ -79,6 +84,14 @@
        status = "okay";
 };
 
+&scif0 {
+       pinctrl-0 = <&scif0_pins>;
+       pinctrl-names = "default";
+
+       uart-has-rtscts;
+       status = "okay";
+};
+
 &scif_clk {
        clock-frequency = <24000000>;
 };

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider.dts b/arch/arm64/boot/dts/renesas/r8a779f0-spider.dts
index 2e3b719cc749492d4acb7beebcb2f77028d04dc6..7a7c8ffba7118a1f61bae97d6d5290ef0ae7602b 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider.dts
@@ -15,6 +15,7 @@
 
        aliases {
                serial0 = &scif3;
+               serial1 = &scif0;
        };
 
        chosen {