drm/i915/display: Read PSR configuration before VSC SDP
authorJouni Högander <jouni.hogander@intel.com>
Wed, 20 Dec 2023 10:36:08 +0000 (12:36 +0200)
committerJouni Högander <jouni.hogander@intel.com>
Fri, 22 Dec 2023 06:15:13 +0000 (08:15 +0200)
VSC SDP sending is taken care by PSR HW and it's not enabled in
VIDEO_DIP_CTL when PSR is enabled. Readback of VSC SDP is depending on
VSC_SDP being set in intel_crtc_state->infoframes.enabled. In case of PSR
setting this flag is taken care by PSR code -> read back PSR configuration
before reading VSC SDP otherwise we get pipeconfig mismatch error.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Shawn Lee <shawn.c.lee@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-7-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c

index 12a29363e5dfe493a724afddba08f38228fc09fb..2746655bcb264c4b023657331d1a664685f0138a 100644 (file)
@@ -3941,11 +3941,11 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
        if (DISPLAY_VER(dev_priv) >= 8)
                bdw_get_trans_port_sync_config(pipe_config);
 
+       intel_psr_get_config(encoder, pipe_config);
+
        intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
        intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
 
-       intel_psr_get_config(encoder, pipe_config);
-
        intel_audio_codec_get_config(encoder, pipe_config);
 }