csky: Fixup msa highest 3 bits mask

Just as comment mentioned, the msa format:

 cr<30/31, 15> MSA register format:
 31 - 29 | 28 - 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
   BA     Reserved  SH  WA  B   SO SEC  C   D   V

So we should shift 29 bits not 28 bits for mask

Signed-off-by: Liu Yibin <jiulong@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>

diff --git a/arch/csky/abiv1/inc/abi/entry.h b/arch/csky/abiv1/inc/abi/entry.h
index 5056ebb902d18336ac8208da2cbdeee256b920da..61d94ec7dd160f119426a876152be597c65f4f7c 100644 (file)
--- a/arch/csky/abiv1/inc/abi/entry.h
+++ b/arch/csky/abiv1/inc/abi/entry.h
@@ -167,8 +167,8 @@
         *   BA     Reserved  C   D   V
         */
        cprcr   r6, cpcr30
-       lsri    r6, 28
-       lsli    r6, 28
+       lsri    r6, 29
+       lsli    r6, 29
        addi    r6, 0xe
        cpwcr   r6, cpcr30
 

diff --git a/arch/csky/abiv2/inc/abi/entry.h b/arch/csky/abiv2/inc/abi/entry.h
index a99aff555a0ac1e979ed4aa8378ab80cc1257b87..ab63c41abccadf7c3ba2f2d6b0c526a5b5dad7ec 100644 (file)
--- a/arch/csky/abiv2/inc/abi/entry.h
+++ b/arch/csky/abiv2/inc/abi/entry.h
@@ -285,8 +285,8 @@
         */
        mfcr    r6, cr<30, 15> /* Get MSA0 */
 2:
-       lsri    r6, 28
-       lsli    r6, 28
+       lsri    r6, 29
+       lsli    r6, 29
        addi    r6, 0x1ce
        mtcr    r6, cr<30, 15> /* Set MSA0 */