arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add vision mezzanine
authorBryan O'Donoghue <bryan.odonoghue@linaro.org>
Thu, 17 Nov 2022 00:32:32 +0000 (00:32 +0000)
committerBjorn Andersson <andersson@kernel.org>
Tue, 6 Dec 2022 17:05:31 +0000 (11:05 -0600)
The Vision Mezzanine for the RB5 ships with an imx577 and ov9282 populated.
Other sensors and components may be added or stacked with additional
mezzanines.

Enable the IMX577 on the vision mezzanine.

An example media-ctl pipeline for the imx577 is:

media-ctl --reset
media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'

yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-8-bryan.odonoghue@linaro.org
arch/arm64/boot/dts/qcom/Makefile
arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 681646b7f60b9832e0abb123ebe2ac59cb4912da..4811b50aaaf1734507c36216ada5fa175273caf4 100644 (file)
@@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_QCOM)       += msm8998-xiaomi-sagit.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += qrb5165-rb5.dtb
+dtb-$(CONFIG_ARCH_QCOM)        += qrb5165-rb5-vision-mezzanine.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += sa8155p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += sa8295p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += sc7180-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts
new file mode 100644 (file)
index 0000000..bb149e5
--- /dev/null
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2022, Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "qrb5165-rb5.dts"
+
+&camcc {
+       status = "okay";
+};
+
+&camss {
+       vdda-phy-supply = <&vreg_l5a_0p88>;
+       vdda-pll-supply = <&vreg_l9a_1p2>;
+       status = "okay";
+
+       ports {
+               /* The port index denotes CSIPHY id i.e. csiphy2 */
+               port@2 {
+                       csiphy2_ep: endpoint {
+                               clock-lanes = <7>;
+                               data-lanes = <0 1 2 3>;
+                               remote-endpoint = <&imx577_ep>;
+                       };
+               };
+       };
+};
+
+&cci1 {
+       status = "okay";
+};
+
+&cci1_i2c0 {
+       camera@1a {
+               compatible = "sony,imx577";
+               reg = <0x1a>;
+
+               reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default", "suspend";
+               pinctrl-0 = <&cam2_default>;
+               pinctrl-1 = <&cam2_suspend>;
+
+               clocks = <&camcc CAM_CC_MCLK2_CLK>;
+               assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
+               assigned-clock-rates = <24000000>;
+
+               dovdd-supply  = <&vreg_l7f_1p8>;
+               avdd-supply = <&vdc_5v>;
+               dvdd-supply = <&vdc_5v>;
+
+               port {
+                       imx577_ep: endpoint {
+                               clock-lanes = <1>;
+                               link-frequencies = /bits/ 64 <600000000>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&csiphy2_ep>;
+                       };
+               };
+       };
+};
index c1201eb967a5a743befecac886a05077a8083f32..dab5579946f351f1a43314f121fc5682556f29ff 100644 (file)
                        gpio-ranges = <&tlmm 0 0 181>;
                        wakeup-parent = <&pdc>;
 
+                       cam2_default: cam2-default-state {
+                               rst-pins {
+                                       pins = "gpio78";
+                                       function = "gpio";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+
+                               mclk-pins {
+                                       pins = "gpio96";
+                                       function = "cam_mclk";
+                                       drive-strength = <16>;
+                                       bias-disable;
+                               };
+                       };
+
+                       cam2_suspend: cam2-suspend-state {
+                               rst-pins {
+                                       pins = "gpio78";
+                                       function = "gpio";
+                                       drive-strength = <2>;
+                                       bias-pull-down;
+                                       output-low;
+                               };
+
+                               mclk-pins {
+                                       pins = "gpio96";
+                                       function = "cam_mclk";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+                       };
+
                        cci0_default: cci0-default-state {
                                cci0_i2c0_default: cci0-i2c0-default-pins {
                                        /* SDA, SCL */