ARM: dts: ixp4xx: Add CF to GW2358

This adds support for the compact flash card slot on the
Gateworks GW2358 router.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
index 1a2f9a8082709b4acbf15d634527b52bd1696414..84e6aec8e6651b0f1d8cd5ed034fc451fdbab925 100644 (file)
--- a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
+++ b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
@@ -95,6 +95,29 @@
                                        fis-index-block = <0xff>;
                                };
                        };
+                       ide@3,0 {
+                               compatible = "intel,ixp4xx-compact-flash";
+                               /*
+                                * Set up expansion bus config to a really slow timing.
+                                * The CF driver will dynamically reconfigure these timings
+                                * depending on selected PIO mode (0-4).
+                                */
+                               intel,ixp4xx-eb-t1 = <3>; // 3 cycles extra address phase
+                               intel,ixp4xx-eb-t2 = <3>; // 3 cycles extra setup phase
+                               intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
+                               intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
+                               intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phase
+                               intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
+                               intel,ixp4xx-eb-byte-access-on-halfword = <1>;
+                               intel,ixp4xx-eb-mux-address-and-data = <0>;
+                               intel,ixp4xx-eb-ahb-split-transfers = <0>;
+                               intel,ixp4xx-eb-write-enable = <1>;
+                               intel,ixp4xx-eb-byte-access = <1>;
+                               /* First register set is CMD second is CTL */
+                               reg = <3 0xe00000 0x40000>, <3 0xe40000 0x40000>;
+                               interrupt-parent = <&gpio0>;
+                               interrupts = <12 IRQ_TYPE_EDGE_RISING>;
+                       };
                };
 
                pci@c0000000 {