arm64: dts: qcom: sdm670: add opps for peripherals
authorRichard Acayan <mailingradian@gmail.com>
Wed, 1 Feb 2023 01:00:20 +0000 (20:00 -0500)
committerBjorn Andersson <andersson@kernel.org>
Mon, 13 Mar 2023 19:36:36 +0000 (12:36 -0700)
The interconnects are now in place. Add Operating Performance Points for
them to allow the kernel to properly manage them.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230201010020.84586-3-mailingradian@gmail.com
arch/arm64/boot/dts/qcom/sdm670.dtsi

index 02f14692dd9da4e744fc6431a65d5c898636cb2c..c5f839dd1c6e3ab3fe9e44ba90da467db99f8e8a 100644 (file)
@@ -10,6 +10,7 @@
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy-qcom-qusb2.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
                                 <&gcc GCC_SDCC1_ICE_CORE_CLK>,
                                 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>;
                        clock-names = "iface", "core", "xo", "ice", "bus";
+                       interconnects = <&aggre1_noc MASTER_EMMC 0 &aggre1_noc SLAVE_A1NOC_SNOC 0>,
+                                       <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_EMMC_CFG 0>;
+                       interconnect-names = "sdhc-ddr", "cpu-sdhc";
+                       operating-points-v2 = <&sdhc1_opp_table>;
 
                        iommus = <&apps_smmu 0x140 0xf>;
 
                        non-removable;
 
                        status = "disabled";
+
+                       sdhc1_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-20000000 {
+                                       opp-hz = /bits/ 64 <20000000>;
+                                       required-opps = <&rpmhpd_opp_min_svs>;
+                                       opp-peak-kBps = <80000 80000>;
+                                       opp-avg-kBps = <52286 80000>;
+                               };
+
+                               opp-50000000 {
+                                       opp-hz = /bits/ 64 <50000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                                       opp-peak-kBps = <200000 100000>;
+                                       opp-avg-kBps = <130718 100000>;
+                               };
+
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmhpd_opp_svs>;
+                                       opp-peak-kBps = <200000 130000>;
+                                       opp-avg-kBps = <130718 130000>;
+                               };
+
+                               opp-384000000 {
+                                       opp-hz = /bits/ 64 <384000000>;
+                                       required-opps = <&rpmhpd_opp_nom>;
+                                       opp-peak-kBps = <4096000 4096000>;
+                                       opp-avg-kBps = <1338562 1338562>;
+                               };
+                       };
                };
 
                gpi_dma0: dma-controller@800000 {
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;
+                       interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>;
+                       interconnect-names = "qup-core";
                        status = "disabled";
 
                        i2c0: i2c@880000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 6 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>,
+                                               <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
                                       <&gpi_dma0 1 7 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;
+                       interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>;
+                       interconnect-names = "qup-core";
                        status = "disabled";
 
                        i2c8: i2c@a80000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 6 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                power-domains = <&rpmhpd SDM670_CX>;
+                               interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>,
+                                               <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>;
+                               interconnect-names = "qup-core", "qup-config", "qup-memory";
                                dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
                                       <&gpi_dma1 1 7 QCOM_GPI_I2C>;
                                dma-names = "tx", "rx";
 
                        resets = <&gcc GCC_USB30_PRIM_BCR>;
 
+                       interconnects = <&aggre2_noc MASTER_USB3 0 &mem_noc SLAVE_EBI_CH0 0>,
+                                       <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
+                       interconnect-names = "usb-ddr", "apps-usb";
+
                        status = "disabled";
 
                        usb_1_dwc3: usb@a600000 {