drm/amd/display: fix 64 bit divide in freesync code

Use div_u64() rather than a a 64 bit divide.

Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround")
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Angus Wang <Angus.Wang@amd.com>
Cc: Anthony Koo <Anthony.Koo@amd.com>
Cc: Aric Cyr <Aric.Cyr@amd.com>
Cc: Nathan Chancellor <nathan@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index 0130f18791167d3de71c01fd3476886bb38caf17..d2d76ce56f898981644e126e1c295f98ba1d235f 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -1239,7 +1239,7 @@ void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
        if (in_out_vrr->supported == false)
                return;
 
-       cur_timestamp_in_us = dm_get_timestamp(core_freesync->dc->ctx)/10;
+       cur_timestamp_in_us = div_u64(dm_get_timestamp(core_freesync->dc->ctx), 10);
 
        in_out_vrr->flip_interval.vsyncs_between_flip++;
        in_out_vrr->flip_interval.v_update_timestamp_in_us = cur_timestamp_in_us;