drm/amdgpu: add utcl2 RAS poison query for mmhub
authorTao Zhou <tao.zhou1@amd.com>
Mon, 11 Mar 2024 08:51:49 +0000 (16:51 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 20 Mar 2024 17:38:14 +0000 (13:38 -0400)
Add it for mmhub v1.8.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

index 1ca9d4ed8063a61a6713bf5054273a333248e126..95d676ee207f3f5a30132d46d1b91369ad13b9e7 100644 (file)
@@ -63,6 +63,8 @@ struct amdgpu_mmhub_funcs {
                                uint64_t page_table_base);
        void (*update_power_gating)(struct amdgpu_device *adev,
                                 bool enable);
+       bool (*query_utcl2_poison_status)(struct amdgpu_device *adev,
+                               int hub_inst);
 };
 
 struct amdgpu_mmhub {
index c41f600a5e1020d4d4c58363383c0fed760f9c29..50113cadaa0d200f5e0c49c0fa129397db509c33 100644 (file)
@@ -559,6 +559,20 @@ static void mmhub_v1_8_get_clockgating(struct amdgpu_device *adev, u64 *flags)
 
 }
 
+static bool mmhub_v1_8_query_utcl2_poison_status(struct amdgpu_device *adev,
+                               int hub_inst)
+{
+       u32 fed, status;
+
+       status = RREG32_SOC15(MMHUB, hub_inst, regVM_L2_PROTECTION_FAULT_STATUS);
+       fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);
+       /* reset page fault status */
+       WREG32_P(SOC15_REG_OFFSET(MMHUB, hub_inst,
+                       regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);
+
+       return fed;
+}
+
 const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = {
        .get_fb_location = mmhub_v1_8_get_fb_location,
        .init = mmhub_v1_8_init,
@@ -568,6 +582,7 @@ const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = {
        .setup_vm_pt_regs = mmhub_v1_8_setup_vm_pt_regs,
        .set_clockgating = mmhub_v1_8_set_clockgating,
        .get_clockgating = mmhub_v1_8_get_clockgating,
+       .query_utcl2_poison_status = mmhub_v1_8_query_utcl2_poison_status,
 };
 
 static const struct amdgpu_ras_err_status_reg_entry mmhub_v1_8_ce_reg_list[] = {