arm64: dts: qcom: sm8250: don't enable rx/tx macro by default
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 1 Apr 2022 18:58:14 +0000 (21:58 +0300)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 12 Apr 2022 02:40:57 +0000 (21:40 -0500)
Enabling rxmacro and txmacro nodes by defaults makes Qualcomm RB5 to
crash and reboot while probing audio devices. Disable these device tree
nodes by default and enabled them only when necessary (for the
SM8250-MTP board).

Fixes: 24f52ef0c4bf ("arm64: dts: qcom: sm8250: Add nodes for tx and rx macros with soundwire masters")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401185814.519653-1-dmitry.baryshkov@linaro.org
arch/arm64/boot/dts/qcom/sm8250-mtp.dts
arch/arm64/boot/dts/qcom/sm8250.dtsi

index fb99cc2827c76133fdfd71b97177f518b9386916..7ab3627cc347d6a15c6fd9b8efad50a0f62468ca 100644 (file)
        status = "okay";
 };
 
+&rxmacro {
+       status = "okay";
+};
+
 &slpi {
        status = "okay";
        firmware-name = "qcom/sm8250/slpi.mbn";
 };
 
 &swr1 {
+       status = "okay";
+
        wcd_rx: wcd9380-rx@0,4 {
                compatible = "sdw20217010d00";
                reg = <0 4>;
 };
 
 &swr2 {
+       status = "okay";
+
        wcd_tx: wcd9380-tx@0,3 {
                compatible = "sdw20217010d00";
                reg = <0 3>;
        };
 };
 
+&txmacro {
+       status = "okay";
+};
+
 &uart12 {
        status = "okay";
 };
index af8f226364361bcd4e0f00b2f073a389ad3f64ea..1304b86af1a00772ac0478d607f42950b5e318e6 100644 (file)
                        pinctrl-0 = <&rx_swr_active>;
                        compatible = "qcom,sm8250-lpass-rx-macro";
                        reg = <0 0x3200000 0 0x1000>;
+                       status = "disabled";
 
                        clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
                                <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
                swr1: soundwire-controller@3210000 {
                        reg = <0 0x3210000 0 0x2000>;
                        compatible = "qcom,soundwire-v1.5.1";
+                       status = "disabled";
                        interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&rxmacro>;
                        clock-names = "iface";
                        pinctrl-0 = <&tx_swr_active>;
                        compatible = "qcom,sm8250-lpass-tx-macro";
                        reg = <0 0x3220000 0 0x1000>;
+                       status = "disabled";
 
                        clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
                                 <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
                        compatible = "qcom,soundwire-v1.5.1";
                        interrupts-extended = <&intc GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "core";
+                       status = "disabled";
 
                        clocks = <&txmacro>;
                        clock-names = "iface";