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Optimize the conventional move operation.
author
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 22 Nov 2007 15:10:21 +0000
(15:10 +0000)
committer
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 22 Nov 2007 15:10:21 +0000
(15:10 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3720
c046a42c
-6fe2-441c-8c8c-
71466251a162
target-mips/translate.c
patch
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diff --git
a/target-mips/translate.c
b/target-mips/translate.c
index b3ae2ccfea1487b606dd832b14517f70cd135365..55e6290f31ab84e50bd90f7e894f691c6d0a2ec9 100644
(file)
--- a/
target-mips/translate.c
+++ b/
target-mips/translate.c
@@
-1240,6
+1240,12
@@
static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
return;
}
GEN_LOAD_REG_TN(T0, rs);
+ /* Specialcase the conventional move operation. */
+ if (rt == 0 && (opc == OPC_ADDU || opc == OPC_DADDU
+ || opc == OPC_SUBU || opc == OPC_DSUBU)) {
+ GEN_STORE_TN_REG(rd, T0);
+ return;
+ }
GEN_LOAD_REG_TN(T1, rt);
switch (opc) {
case OPC_ADD: