drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macros

To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.

Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/545370/
Link: https://lore.kernel.org/r/20230704022136.130522-14-dmitry.baryshkov@linaro.org

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
index a07c68744b29051992143368ad6a35048cf7c5f1..d5111f3782a28afeaf9476eff55e5e016a912919 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
@@ -200,8 +200,13 @@ static const struct dpu_pingpong_cfg msm8998_pp[] = {
 };
 
 static const struct dpu_dsc_cfg msm8998_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, 0),
-       DSC_BLK("dsc_1", DSC_1, 0x80400, 0),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+       }, {
+               .name = "dsc_1", .id = DSC_1,
+               .base = 0x80400, .len = 0x140,
+       },
 };
 
 static const struct dpu_dspp_cfg msm8998_dspp[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
index 6fd462c5d2aaf45d8425ad5bfcb72c185e34ed72..ca3a2b3c861a630f4a78ebfa394891fbf9f26c00 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
@@ -224,10 +224,19 @@ static const struct dpu_pingpong_cfg sdm845_pp[] = {
 };
 
 static const struct dpu_dsc_cfg sdm845_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, 0),
-       DSC_BLK("dsc_1", DSC_1, 0x80400, 0),
-       DSC_BLK("dsc_2", DSC_2, 0x80800, 0),
-       DSC_BLK("dsc_3", DSC_3, 0x80c00, 0),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+       }, {
+               .name = "dsc_1", .id = DSC_1,
+               .base = 0x80400, .len = 0x140,
+       }, {
+               .name = "dsc_2", .id = DSC_2,
+               .base = 0x80800, .len = 0x140,
+       }, {
+               .name = "dsc_3", .id = DSC_3,
+               .base = 0x80c00, .len = 0x140,
+       },
 };
 
 static const struct dpu_intf_cfg sdm845_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index 0a1f55609b9ac88318ef53b061738b6bf59b802e..0b68f2fedb377abdcffa6a39f8c23bf09cbb15e2 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -245,10 +245,23 @@ static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = {
 };
 
 static const struct dpu_dsc_cfg sm8150_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_1", .id = DSC_1,
+               .base = 0x80400, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_2", .id = DSC_2,
+               .base = 0x80800, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_3", .id = DSC_3,
+               .base = 0x80c00, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       },
 };
 
 static const struct dpu_intf_cfg sm8150_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index 885894c1a00cbb722822c03b96ef485fec9c6134..5b36bafb6f9c639a4e0d8b59958cebf365fff515 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -244,12 +244,31 @@ static const struct dpu_merge_3d_cfg sc8180x_merge_3d[] = {
 };
 
 static const struct dpu_dsc_cfg sc8180x_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_4", DSC_4, 0x81000, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_5", DSC_5, 0x81400, BIT(DPU_DSC_OUTPUT_CTRL)),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_1", .id = DSC_1,
+               .base = 0x80400, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_2", .id = DSC_2,
+               .base = 0x80800, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_3", .id = DSC_3,
+               .base = 0x80c00, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_4", .id = DSC_4,
+               .base = 0x81000, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_5", .id = DSC_5,
+               .base = 0x81400, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       },
 };
 
 static const struct dpu_intf_cfg sc8180x_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index f3ce6c0c2ce4c352461c0baa6cd551d109a16721..e226f190e8e629ddc0e01c1aaa34f88043ad8b9f 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -245,10 +245,23 @@ static const struct dpu_merge_3d_cfg sm8250_merge_3d[] = {
 };
 
 static const struct dpu_dsc_cfg sm8250_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
-       DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_1", .id = DSC_1,
+               .base = 0x80400, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_2", .id = DSC_2,
+               .base = 0x80800, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       }, {
+               .name = "dsc_3", .id = DSC_3,
+               .base = 0x80c00, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       },
 };
 
 static const struct dpu_intf_cfg sm8250_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
index d7a18d6b986ca57d4971e3b6af1c3676ef225b67..6b41adf42173c0a80dda58fdb9c92ef136a39024 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
@@ -136,7 +136,11 @@ static struct dpu_pingpong_cfg sm6350_pp[] = {
 };
 
 static const struct dpu_dsc_cfg sm6350_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       },
 };
 
 static const struct dpu_intf_cfg sm6350_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
index 368645e266f374d4da56f2a51468e1e59356cd8b..f988ab076a5857288f67517bfc0a79c1081188a4 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
@@ -90,7 +90,11 @@ static const struct dpu_pingpong_cfg sm6375_pp[] = {
 };
 
 static const struct dpu_dsc_cfg sm6375_dsc[] = {
-       DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
+       {
+               .name = "dsc_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x140,
+               .features = BIT(DPU_DSC_OUTPUT_CTRL),
+       },
 };
 
 static const struct dpu_intf_cfg sm6375_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 42a9403727a7605fbb2d0168c9e76c8aceeb1854..a0456bbb491e82292c4f408615d815e2f65e5c60 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -248,10 +248,27 @@ static const struct dpu_merge_3d_cfg sm8350_merge_3d[] = {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sm8350_dsc[] = {
-       DSC_BLK_1_2("dce_0_0", DSC_0, 0x80000, 0x29c, 0, dsc_sblk_0),
-       DSC_BLK_1_2("dce_0_1", DSC_1, 0x80000, 0x29c, 0, dsc_sblk_1),
-       DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-       DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),
+       {
+               .name = "dce_0_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_0_1", .id = DSC_1,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_1,
+       }, {
+               .name = "dce_1_0", .id = DSC_2,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_1_1", .id = DSC_3,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_1,
+       },
 };
 
 static const struct dpu_intf_cfg sm8350_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 419bf0985dee95c3923c1bfa1a5e1e71b4b4c992..4494f3ba1e4e14644f70f2c4d4622f8cbafc7c7f 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -146,7 +146,12 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = {
 
 /* NOTE: sc7280 only has one DSC hard slice encoder */
 static const struct dpu_dsc_cfg sc7280_dsc[] = {
-       DSC_BLK_1_2("dce_0_0", DSC_0, 0x80000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
+       {
+               .name = "dce_0_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_0,
+       },
 };
 
 static const struct dpu_wb_cfg sc7280_wb[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
index 8b6278b73581b75077cf9f585bea8bccfe40c590..63bbe0c200fd42f63c5b20682b37e1848aaf51fb 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
@@ -246,12 +246,37 @@ static const struct dpu_merge_3d_cfg sc8280xp_merge_3d[] = {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sc8280xp_dsc[] = {
-       DSC_BLK_1_2("dce_0_0", DSC_0, 0x80000, 0x29c, 0, dsc_sblk_0),
-       DSC_BLK_1_2("dce_0_1", DSC_1, 0x80000, 0x29c, 0, dsc_sblk_1),
-       DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-       DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),
-       DSC_BLK_1_2("dce_2_0", DSC_4, 0x82000, 0x29c, 0, dsc_sblk_0),
-       DSC_BLK_1_2("dce_2_1", DSC_5, 0x82000, 0x29c, 0, dsc_sblk_1),
+       {
+               .name = "dce_0_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_0_1", .id = DSC_1,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_1,
+       }, {
+               .name = "dce_1_0", .id = DSC_2,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_1_1", .id = DSC_3,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_1,
+       }, {
+               .name = "dce_2_0", .id = DSC_4,
+               .base = 0x82000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_2_1", .id = DSC_5,
+               .base = 0x82000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_1,
+       },
 };
 
 /* TODO: INTF 3, 8 and 7 are used for MST, marked as INTF_NONE for now */

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
index 0026b3d712d6f1983534cb2d10f131e0bbe7ce49..a7408d0ac0360779af5c999e8a736f1f5787bacc 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
@@ -259,10 +259,27 @@ static const struct dpu_merge_3d_cfg sm8450_merge_3d[] = {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sm8450_dsc[] = {
-       DSC_BLK_1_2("dce_0_0", DSC_0, 0x80000, 0x29c, 0, dsc_sblk_0),
-       DSC_BLK_1_2("dce_0_1", DSC_1, 0x80000, 0x29c, 0, dsc_sblk_1),
-       DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-       DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),
+       {
+               .name = "dce_0_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_0_1", .id = DSC_1,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_1,
+       }, {
+               .name = "dce_1_0", .id = DSC_2,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_1_1", .id = DSC_3,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_1,
+       },
 };
 
 static const struct dpu_intf_cfg sm8450_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index 076558f76162dbc3260c32d57dfc68aaa647a114..a1fd282832fd1a5e2f4194714eca19b8c48f319e 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -273,10 +273,27 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = {
  * its own different sub block address.
  */
 static const struct dpu_dsc_cfg sm8550_dsc[] = {
-       DSC_BLK_1_2("dce_0_0", DSC_0, 0x80000, 0x29c, 0, dsc_sblk_0),
-       DSC_BLK_1_2("dce_0_1", DSC_1, 0x80000, 0x29c, 0, dsc_sblk_1),
-       DSC_BLK_1_2("dce_1_0", DSC_2, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_0),
-       DSC_BLK_1_2("dce_1_1", DSC_3, 0x81000, 0x29c, BIT(DPU_DSC_NATIVE_42x_EN), dsc_sblk_1),
+       {
+               .name = "dce_0_0", .id = DSC_0,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_0_1", .id = DSC_1,
+               .base = 0x80000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2),
+               .sblk = &dsc_sblk_1,
+       }, {
+               .name = "dce_1_0", .id = DSC_2,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_0,
+       }, {
+               .name = "dce_1_1", .id = DSC_3,
+               .base = 0x81000, .len = 0x29c,
+               .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
+               .sblk = &dsc_sblk_1,
+       },
 };
 
 static const struct dpu_intf_cfg sm8550_intf[] = {

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 371aa6c85d418da2cdc56e51e16091344300bb48..e81fbd1985bbc0c26c8625e07bb62c3c2fd0c2b2 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -495,21 +495,6 @@ static const struct dpu_dsc_sub_blks dsc_sblk_1 = {
        .ctl = {.base = 0xF80, .len = 0x10},
 };
 
-#define DSC_BLK(_name, _id, _base, _features) \
-       {\
-       .name = _name, .id = _id, \
-       .base = _base, .len = 0x140, \
-       .features = _features, \
-       }
-
-#define DSC_BLK_1_2(_name, _id, _base, _len, _features, _sblk) \
-       {\
-       .name = _name, .id = _id, \
-       .base = _base, .len = _len, \
-       .features = BIT(DPU_DSC_HW_REV_1_2) | _features, \
-       .sblk = &_sblk, \
-       }
-
 /*************************************************************
  * INTF sub blocks config
  *************************************************************/