drm/xe/display: Mark dpt and related vma as uncached
authorJuha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Mon, 18 Mar 2024 20:18:50 +0000 (22:18 +0200)
committerMatthew Auld <matthew.auld@intel.com>
Tue, 19 Mar 2024 09:09:41 +0000 (09:09 +0000)
Mark dpt and related vma as uncached to avoid pipe faults on some devices.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240318201850.127785-1-juhapekka.heikkila@gmail.com
drivers/gpu/drm/xe/display/xe_fb_pin.c

index b220f136be7035267a5e870e9a414b53e8d80ba8..2eb6225101864d5a49fe82e037ba8e2463c39b58 100644 (file)
@@ -30,7 +30,7 @@ write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_
 
                for (row = 0; row < height; row++) {
                        u64 pte = ggtt->pt_ops->pte_encode_bo(bo, src_idx * XE_PAGE_SIZE,
-                                                             xe->pat.idx[XE_CACHE_WB]);
+                                                             xe->pat.idx[XE_CACHE_NONE]);
 
                        iosys_map_wr(map, *dpt_ofs, u64, pte);
                        *dpt_ofs += 8;
@@ -62,7 +62,7 @@ write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
                for (column = 0; column < width; column++) {
                        iosys_map_wr(map, *dpt_ofs, u64,
                                     pte_encode_bo(bo, src_idx * XE_PAGE_SIZE,
-                                    xe->pat.idx[XE_CACHE_WB]));
+                                    xe->pat.idx[XE_CACHE_NONE]));
 
                        *dpt_ofs += 8;
                        src_idx++;
@@ -122,7 +122,7 @@ static int __xe_pin_fb_vma_dpt(struct intel_framebuffer *fb,
 
                for (x = 0; x < size / XE_PAGE_SIZE; x++) {
                        u64 pte = ggtt->pt_ops->pte_encode_bo(bo, x * XE_PAGE_SIZE,
-                                                             xe->pat.idx[XE_CACHE_WB]);
+                                                             xe->pat.idx[XE_CACHE_NONE]);
 
                        iosys_map_wr(&dpt->vmap, x * 8, u64, pte);
                }
@@ -168,7 +168,7 @@ write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo
 
                for (row = 0; row < height; row++) {
                        u64 pte = ggtt->pt_ops->pte_encode_bo(bo, src_idx * XE_PAGE_SIZE,
-                                                             xe->pat.idx[XE_CACHE_WB]);
+                                                             xe->pat.idx[XE_CACHE_NONE]);
 
                        xe_ggtt_set_pte(ggtt, *ggtt_ofs, pte);
                        *ggtt_ofs += XE_PAGE_SIZE;
@@ -214,7 +214,7 @@ static int __xe_pin_fb_vma_ggtt(struct intel_framebuffer *fb,
 
                for (x = 0; x < size; x += XE_PAGE_SIZE) {
                        u64 pte = ggtt->pt_ops->pte_encode_bo(bo, x,
-                                                             xe->pat.idx[XE_CACHE_WB]);
+                                                             xe->pat.idx[XE_CACHE_NONE]);
 
                        xe_ggtt_set_pte(ggtt, vma->node.start + x, pte);
                }