dt-bindings: pinctrl: convert qcom,mdm9615-pinctrl.txt to dt-schema

Convert the MDM9515 pinctrl bindings to dt-schema.
Keep the parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, optional children with '-pins').

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org
[krzk: drop function from required]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt
deleted file mode 100644 (file)
index d469739..0000000
--- a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt
+++ /dev/null
@@ -1,161 +0,0 @@
-Qualcomm MDM9615 TLMM block
-
-This binding describes the Top Level Mode Multiplexer block found in the
-MDM9615 platform.
-
-- compatible:
-       Usage: required
-       Value type: <string>
-       Definition: must be "qcom,mdm9615-pinctrl"
-
-- reg:
-       Usage: required
-       Value type: <prop-encoded-array>
-       Definition: the base address and size of the TLMM register space.
-
-- interrupts:
-       Usage: required
-       Value type: <prop-encoded-array>
-       Definition: should specify the TLMM summary IRQ.
-
-- interrupt-controller:
-       Usage: required
-       Value type: <none>
-       Definition: identifies this node as an interrupt controller
-
-- #interrupt-cells:
-       Usage: required
-       Value type: <u32>
-       Definition: must be 2. Specifying the pin number and flags, as defined
-                   in <dt-bindings/interrupt-controller/irq.h>
-
-- gpio-controller:
-       Usage: required
-       Value type: <none>
-       Definition: identifies this node as a gpio controller
-
-- #gpio-cells:
-       Usage: required
-       Value type: <u32>
-       Definition: must be 2. Specifying the pin number and flags, as defined
-                   in <dt-bindings/gpio/gpio.h>
-
-- gpio-ranges:
-       Usage: required
-       Definition:  see ../gpio/gpio.txt
-
-- gpio-reserved-ranges:
-       Usage: optional
-       Definition: see ../gpio/gpio.txt
-
-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
-a general description of GPIO and interrupt bindings.
-
-Please refer to pinctrl-bindings.txt in this directory for details of the
-common pinctrl bindings used by client devices, including the meaning of the
-phrase "pin configuration node".
-
-The pin configuration nodes act as a container for an arbitrary number of
-subnodes. Each of these subnodes represents some desired configuration for a
-pin, a group, or a list of pins or groups. This configuration can include the
-mux function to select on those pin(s)/group(s), and various pin configuration
-parameters, such as pull-up, drive strength, etc.
-
-
-PIN CONFIGURATION NODES:
-
-The name of each subnode is not important; all subnodes should be enumerated
-and processed purely based on their content.
-
-Each subnode only affects those parameters that are explicitly listed. In
-other words, a subnode that lists a mux function but no pin configuration
-parameters implies no information about any pin configuration parameters.
-Similarly, a pin subnode that describes a pullup parameter implies no
-information about e.g. the mux function.
-
-
-The following generic properties as defined in pinctrl-bindings.txt are valid
-to specify in a pin configuration subnode:
-
-- pins:
-       Usage: required
-       Value type: <string-array>
-       Definition: List of gpio pins affected by the properties specified in
-                   this subnode.  Valid pins are:
-                   gpio0-gpio87
-
-- function:
-       Usage: required
-       Value type: <string>
-       Definition: Specify the alternative function to be configured for the
-                   specified pins.
-                   Valid values are:
-                   gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
-                   sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,
-                   cdc_mclk
-
-- bias-disable:
-       Usage: optional
-       Value type: <none>
-       Definition: The specified pins should be configured as no pull.
-
-- bias-pull-down:
-       Usage: optional
-       Value type: <none>
-       Definition: The specified pins should be configured as pull down.
-
-- bias-pull-up:
-       Usage: optional
-       Value type: <none>
-       Definition: The specified pins should be configured as pull up.
-
-- output-high:
-       Usage: optional
-       Value type: <none>
-       Definition: The specified pins are configured in output mode, driven
-                   high.
-
-- output-low:
-       Usage: optional
-       Value type: <none>
-       Definition: The specified pins are configured in output mode, driven
-                   low.
-
-- drive-strength:
-       Usage: optional
-       Value type: <u32>
-       Definition: Selects the drive strength for the specified pins, in mA.
-                   Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
-
-Example:
-
-       msmgpio: pinctrl@800000 {
-               compatible = "qcom,mdm9615-pinctrl";
-               reg = <0x800000 0x4000>;
-
-               gpio-controller;
-               #gpio-cells = <2>;
-               gpio-ranges = <&msmgpio 0 0 88>;
-               interrupt-controller;
-               #interrupt-cells = <2>;
-               interrupts = <0 16 0x4>;
-
-               gsbi8_uart: gsbi8-uart {
-                       mux {
-                               pins = "gpio34", "gpio35";
-                               function = "gsbi8";
-                       };
-
-                       tx {
-                               pins = "gpio34";
-                               drive-strength = <4>;
-                               bias-disable;
-                       };
-
-                       rx {
-                               pins = "gpio35";
-                               drive-strength = <2>;
-                               bias-pull-up;
-                       };
-               };
-       };

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml
new file mode 100644 (file)
index 0000000..a4f6e4c
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml
@@ -0,0 +1,119 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. MDM9615 TLMM block
+
+maintainers:
+  - Bjorn Andersson <andersson@kernel.org>
+
+description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC.
+
+$ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
+
+properties:
+  compatible:
+    const: qcom,mdm9615-pinctrl
+
+  reg:
+    maxItems: 1
+
+  interrupts: true
+  interrupt-controller: true
+  '#interrupt-cells': true
+  gpio-controller: true
+  '#gpio-cells': true
+  gpio-ranges: true
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+patternProperties:
+  "-state$":
+    oneOf:
+      - $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
+      - patternProperties:
+          "-pins$":
+            $ref: "#/$defs/qcom-mdm9615-pinctrl-state"
+        additionalProperties: false
+
+$defs:
+  qcom-mdm9615-pinctrl-state:
+    type: object
+    description:
+      Pinctrl node's client devices use subnodes for desired pin configuration.
+      Client device subnodes use below standard properties.
+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
+
+    properties:
+      pins:
+        description:
+          List of gpio pins affected by the properties specified in this
+          subnode.
+        items:
+          pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$"
+        minItems: 1
+        maxItems: 16
+
+      function:
+        description:
+          Specify the alternative function to be configured for the specified
+          pins.
+
+        enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
+                sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ]
+
+      bias-disable: true
+      bias-pull-down: true
+      bias-pull-up: true
+      drive-strength: true
+      output-high: true
+      output-low: true
+      input-enable: true
+
+    required:
+      - pins
+
+    additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    tlmm: pinctrl@1000000 {
+      compatible = "qcom,mdm9615-pinctrl";
+      reg = <0x01000000 0x300000>;
+      interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+      gpio-controller;
+      gpio-ranges = <&msmgpio 0 0 88>;
+      #gpio-cells = <2>;
+      interrupt-controller;
+      #interrupt-cells = <2>;
+
+      gsbi3-state {
+        pins = "gpio8", "gpio9", "gpio10", "gpio11";
+        function = "gsbi3";
+        drive-strength = <8>;
+        bias-disable;
+      };
+
+      gsbi5-i2c-state {
+        sda-pins {
+          pins = "gpio16";
+          function = "gsbi5_i2c";
+          drive-strength = <8>;
+          bias-disable;
+        };
+
+        scl-pins {
+          pins = "gpio17";
+          function = "gsbi5_i2c";
+          drive-strength = <2>;
+          bias-disable;
+        };
+      };
+    };