arm64: dts: qcom: qcs404: add spmi node
authorVinod Koul <vkoul@kernel.org>
Fri, 9 Nov 2018 09:44:09 +0000 (15:14 +0530)
committerAndy Gross <andy.gross@linaro.org>
Sun, 18 Nov 2018 07:08:36 +0000 (01:08 -0600)
PMS405 is used in QCS405-EVB so include that with SPMI nodes

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
arch/arm64/boot/dts/qcom/qcs404.dtsi

index 358d6d5f7d85ac320f35e520d67ad1b17cc4cd4c..db035fef67d9083a0fe7d50a85951dcb74a58d32 100644 (file)
@@ -2,6 +2,7 @@
 // Copyright (c) 2018, Linaro Limited
 
 #include "qcs404.dtsi"
+#include "pms405.dtsi"
 
 / {
        aliases {
index 1b3e21c1fed98e83511b69a6c6c4b2fd7ceb0259..0101cd5896b3c99730da92774c786baed2c2b914 100644 (file)
                        reg = <0x01905000 0x20000>;
                };
 
+               spmi_bus: spmi@200f000 {
+                       compatible = "qcom,spmi-pmic-arb";
+                       reg = <0x0200f000 0x001000>,
+                             <0x02400000 0x800000>,
+                             <0x02c00000 0x800000>,
+                             <0x03800000 0x200000>,
+                             <0x0200a000 0x002100>;
+                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+                       interrupt-names = "periph_irq";
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+                       qcom,ee = <0>;
+                       qcom,channel = <0>;
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       interrupt-controller;
+                       #interrupt-cells = <4>;
+               };
+
                sdcc1: sdcc@7804000 {
                        compatible = "qcom,sdhci-msm-v5";
                        reg = <0x07804000 0x1000>, <0x7805000 0x1000>;