pinctrl: renesas: r8a779a0: Add CANFD pins, groups and functions

This patch adds CANFD 0-7 and CANFD clock pinmux support for the
R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165929.31002-4-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index b43bdd2cf7d3dcecd53997641e8458deb27358e7..68b528c4e64b85e025d6c38928c43074869aab46 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -1689,6 +1689,87 @@ static const unsigned int avb5_avtp_match_mux[] = {
        AVB5_AVTP_MATCH_MARK,
 };
 
+/* - CANFD0 ----------------------------------------------------------------- */
+static const unsigned int canfd0_data_pins[] = {
+       /* CANFD0_TX, CANFD0_RX */
+       RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2),
+};
+static const unsigned int canfd0_data_mux[] = {
+       CANFD0_TX_MARK, CANFD0_RX_MARK,
+};
+
+/* - CANFD1 ----------------------------------------------------------------- */
+static const unsigned int canfd1_data_pins[] = {
+       /* CANFD1_TX, CANFD1_RX */
+       RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4),
+};
+static const unsigned int canfd1_data_mux[] = {
+       CANFD1_TX_MARK, CANFD1_RX_MARK,
+};
+
+/* - CANFD2 ----------------------------------------------------------------- */
+static const unsigned int canfd2_data_pins[] = {
+       /* CANFD2_TX, CANFD2_RX */
+       RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
+};
+static const unsigned int canfd2_data_mux[] = {
+       CANFD2_TX_MARK, CANFD2_RX_MARK,
+};
+
+/* - CANFD3 ----------------------------------------------------------------- */
+static const unsigned int canfd3_data_pins[] = {
+       /* CANFD3_TX, CANFD3_RX */
+       RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8),
+};
+static const unsigned int canfd3_data_mux[] = {
+       CANFD3_TX_MARK, CANFD3_RX_MARK,
+};
+
+/* - CANFD4 ----------------------------------------------------------------- */
+static const unsigned int canfd4_data_pins[] = {
+       /* CANFD4_TX, CANFD4_RX */
+       RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 10),
+};
+static const unsigned int canfd4_data_mux[] = {
+       CANFD4_TX_MARK, CANFD4_RX_MARK,
+};
+
+/* - CANFD5 ----------------------------------------------------------------- */
+static const unsigned int canfd5_data_pins[] = {
+       /* CANFD5_TX, CANFD5_RX */
+       RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12),
+};
+static const unsigned int canfd5_data_mux[] = {
+       CANFD5_TX_MARK, CANFD5_RX_MARK,
+};
+
+/* - CANFD6 ----------------------------------------------------------------- */
+static const unsigned int canfd6_data_pins[] = {
+       /* CANFD6_TX, CANFD6_RX */
+       RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
+};
+static const unsigned int canfd6_data_mux[] = {
+       CANFD6_TX_MARK, CANFD6_RX_MARK,
+};
+
+/* - CANFD7 ----------------------------------------------------------------- */
+static const unsigned int canfd7_data_pins[] = {
+       /* CANFD7_TX, CANFD7_RX */
+       RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),
+};
+static const unsigned int canfd7_data_mux[] = {
+       CANFD7_TX_MARK, CANFD7_RX_MARK,
+};
+
+/* - CANFD Clock ------------------------------------------------------------ */
+static const unsigned int can_clk_pins[] = {
+       /* CAN_CLK */
+       RCAR_GP_PIN(3, 0),
+};
+static const unsigned int can_clk_mux[] = {
+       CAN_CLK_MARK,
+};
+
 /* - I2C0 ------------------------------------------------------------------- */
 static const unsigned int i2c0_pins[] = {
        /* SDA0, SCL0 */
@@ -1921,6 +2002,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(avb5_avtp_capture),
        SH_PFC_PIN_GROUP(avb5_avtp_match),
 
+       SH_PFC_PIN_GROUP(canfd0_data),
+       SH_PFC_PIN_GROUP(canfd1_data),
+       SH_PFC_PIN_GROUP(canfd2_data),
+       SH_PFC_PIN_GROUP(canfd3_data),
+       SH_PFC_PIN_GROUP(canfd4_data),
+       SH_PFC_PIN_GROUP(canfd5_data),
+       SH_PFC_PIN_GROUP(canfd6_data),
+       SH_PFC_PIN_GROUP(canfd7_data),
+       SH_PFC_PIN_GROUP(can_clk),
+
        SH_PFC_PIN_GROUP(i2c0),
        SH_PFC_PIN_GROUP(i2c1),
        SH_PFC_PIN_GROUP(i2c2),
@@ -2017,6 +2108,42 @@ static const char * const avb5_groups[] = {
        "avb5_avtp_match",
 };
 
+static const char * const canfd0_groups[] = {
+       "canfd0_data",
+};
+
+static const char * const canfd1_groups[] = {
+       "canfd1_data",
+};
+
+static const char * const canfd2_groups[] = {
+       "canfd2_data",
+};
+
+static const char * const canfd3_groups[] = {
+       "canfd3_data",
+};
+
+static const char * const canfd4_groups[] = {
+       "canfd4_data",
+};
+
+static const char * const canfd5_groups[] = {
+       "canfd5_data",
+};
+
+static const char * const canfd6_groups[] = {
+       "canfd6_data",
+};
+
+static const char * const canfd7_groups[] = {
+       "canfd7_data",
+};
+
+static const char * const can_clk_groups[] = {
+       "can_clk",
+};
+
 static const char * const i2c0_groups[] = {
        "i2c0",
 };
@@ -2082,6 +2209,16 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(avb4),
        SH_PFC_FUNCTION(avb5),
 
+       SH_PFC_FUNCTION(canfd0),
+       SH_PFC_FUNCTION(canfd1),
+       SH_PFC_FUNCTION(canfd2),
+       SH_PFC_FUNCTION(canfd3),
+       SH_PFC_FUNCTION(canfd4),
+       SH_PFC_FUNCTION(canfd5),
+       SH_PFC_FUNCTION(canfd6),
+       SH_PFC_FUNCTION(canfd7),
+       SH_PFC_FUNCTION(can_clk),
+
        SH_PFC_FUNCTION(i2c0),
        SH_PFC_FUNCTION(i2c1),
        SH_PFC_FUNCTION(i2c2),