arm64: dts: imx8mq: Deduplicate PCIe clock-names property

Move the PCIe clock-names property from various DTs into SoC dtsi to
reduce duplication. In case of a couple of boards, reorder the clock
so they match the order in yaml DT bindings.

Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mq.dtsi, imx8mq-tqma8mq-mba8mx.dts
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 78937910f40398fe09bc7d45029df0ba012c074c..7507548cdb16bbd87b8e64f98461379e6e257037 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -356,10 +356,9 @@
        pinctrl-0 = <&pinctrl_pcie0>;
        reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE1_AUX>,
+                <&pcie0_refclk>,
                 <&clk IMX8MQ_CLK_PCIE1_PHY>,
-                <&pcie0_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE1_AUX>;
        vph-supply = <&vgen5_reg>;
        status = "okay";
 };
@@ -369,10 +368,9 @@
        pinctrl-0 = <&pinctrl_pcie1>;
        reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE2_AUX>,
+                <&pcie0_refclk>,
                 <&clk IMX8MQ_CLK_PCIE2_PHY>,
-                <&pcie0_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE2_AUX>;
        vpcie-supply = <&reg_pcie1>;
        vph-supply = <&vgen5_reg>;
        status = "okay";

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts b/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts
index a91c136797f60d6766fb223bbb2f7cd8374ce417..6376417e918c2083bb67c2f978d53602153d3cb9 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts
@@ -245,20 +245,18 @@
        pinctrl-0 = <&pinctrl_pcie0>;
        reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE1_AUX>,
+                <&pcie0_refclk>,
                 <&clk IMX8MQ_CLK_PCIE1_PHY>,
-                <&pcie0_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE1_AUX>;
        status = "okay";
 };
 
 /* Intel Ethernet Controller I210/I211 */
 &pcie1 {
        clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE2_AUX>,
+                <&pcie1_refclk>,
                 <&clk IMX8MQ_CLK_PCIE2_PHY>,
-                <&pcie1_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE2_AUX>;
        fsl,max-link-speed = <1>;
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts
index 055031bba8c4b4a0095549081db3e1d3db2de29a..200268660518d8ede95e0cf9ba07e67aa3e8aa7a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts
@@ -197,10 +197,9 @@
        pinctrl-0 = <&pinctrl_pcie1>;
        reset-gpio = <&gpio3 23 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE2_AUX>,
+                <&pcie1_refclk>,
                 <&clk IMX8MQ_CLK_PCIE2_PHY>,
-                <&pcie1_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE2_AUX>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
index d7660eab68b942c1d3e6355f709e6bdb7dc93d12..344cfdaeb1d5991e664c1d3e8d355ad316c29939 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
@@ -105,10 +105,9 @@
 &pcie0 {
        reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE1_AUX>,
+                <&pcie0_refclk>,
                 <&clk IMX8MQ_CLK_PCIE1_PHY>,
-                <&pcie0_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE1_AUX>;
        epdev_on-supply = <&reg_vcc_3v3>;
        hard-wired = <1>;
        status = "okay";
@@ -120,10 +119,9 @@
  */
 &pcie1 {
        clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE2_AUX>,
+                <&pcie1_refclk>,
                 <&clk IMX8MQ_CLK_PCIE2_PHY>,
-                <&pcie1_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE2_AUX>;
        epdev_on-supply = <&reg_vcc_3v3>;
        hard-wired = <1>;
        status = "okay";

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
index 4e05120c62d410255563eba50422868360beb97a..74a7a589a3296480bdbc0a7a5d2e26ee32c44ebb 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
@@ -551,10 +551,9 @@
        pinctrl-0 = <&pinctrl_pcie0>;
        reset-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE1_AUX>,
+                <&pcie0_refclk>,
                 <&clk IMX8MQ_CLK_PCIE1_PHY>,
-                <&pcie0_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE1_AUX>;
        vph-supply = <&vgen5_reg>;
        status = "okay";
 };
@@ -564,10 +563,9 @@
        pinctrl-0 = <&pinctrl_pcie1>;
        reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
        clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
-                <&clk IMX8MQ_CLK_PCIE2_AUX>,
+                <&pcie1_refclk>,
                 <&clk IMX8MQ_CLK_PCIE2_PHY>,
-                <&pcie1_refclk>;
-       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+                <&clk IMX8MQ_CLK_PCIE2_AUX>;
        vph-supply = <&vgen5_reg>;
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index faed28e3ffa17a00d4e3a4312f7fb4c7fadcf623..98fbba4c99a99111c59d985603fcaf5d810ccf0e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1542,6 +1542,11 @@
                                        <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
                        fsl,max-link-speed = <2>;
                        linux,pci-domain = <0>;
+                       clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
+                                <&clk IMX8MQ_CLK_PCIE1_PHY>,
+                                <&clk IMX8MQ_CLK_PCIE1_PHY>,
+                                <&clk IMX8MQ_CLK_PCIE1_AUX>;
+                       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
                        power-domains = <&pgc_pcie>;
                        resets = <&src IMX8MQ_RESET_PCIEPHY>,
                                 <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
@@ -1579,6 +1584,11 @@
                                        <0 0 0 4 &gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        fsl,max-link-speed = <2>;
                        linux,pci-domain = <1>;
+                       clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+                                <&clk IMX8MQ_CLK_PCIE2_PHY>,
+                                <&clk IMX8MQ_CLK_PCIE2_PHY>,
+                                <&clk IMX8MQ_CLK_PCIE2_AUX>;
+                       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
                        power-domains = <&pgc_pcie>;
                        resets = <&src IMX8MQ_RESET_PCIEPHY2>,
                                 <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>,