arm64: dts: rockchip: Add dfi and dmc nodes to rk3399

These are required to support DDR DVFS on RK3399 platforms.

Change since Daniel's posting: reordered by unit address, per existing
style

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.11.Ie97993621975c5463d7928a8646f3737c9f2921d@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 56af1a1d65ef584f4390ba80585ff4ef9fd4e788..a90beec50f6ade36bbef445b61ce8b863229baa1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -178,6 +178,15 @@
                ports = <&vopl_out>, <&vopb_out>;
        };
 
+       dmc: memory-controller {
+               compatible = "rockchip,rk3399-dmc";
+               rockchip,pmu = <&pmugrf>;
+               devfreq-events = <&dfi>;
+               clocks = <&cru SCLK_DDRC>;
+               clock-names = "dmc_clk";
+               status = "disabled";
+       };
+
        pmu_a53 {
                compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
@@ -1295,6 +1304,16 @@
                status = "disabled";
        };
 
+       dfi: dfi@ff630000 {
+               reg = <0x00 0xff630000 0x00 0x4000>;
+               compatible = "rockchip,rk3399-dfi";
+               rockchip,pmu = <&pmugrf>;
+               interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru PCLK_DDR_MON>;
+               clock-names = "pclk_ddr_mon";
+               status = "disabled";
+       };
+
        vpu: video-codec@ff650000 {
                compatible = "rockchip,rk3399-vpu";
                reg = <0x0 0xff650000 0x0 0x800>;