drm/amdgpu/vcn: remove manual instance setting
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Aug 2021 16:41:29 +0000 (12:41 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 4 Oct 2021 19:23:01 +0000 (15:23 -0400)
Handled by IP discovery now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

index 6c11739270c1fc628570e5653cb787407275d6d0..ad0d2564087cfb4e411b7003b6889a60b54eb4c2 100644 (file)
@@ -66,7 +66,6 @@ static int vcn_v1_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       adev->vcn.num_vcn_inst = 1;
        adev->vcn.num_enc_rings = 2;
 
        vcn_v1_0_set_dec_ring_funcs(adev);
index a03c0fc8338ff356a876269bad16a6932e1cd297..43f46ab07ddaa12e5ef991a682c24634b757fb19 100644 (file)
@@ -69,7 +69,6 @@ static int vcn_v2_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       adev->vcn.num_vcn_inst = 1;
        if (amdgpu_sriov_vf(adev))
                adev->vcn.num_enc_rings = 1;
        else
index b76d96559029eea27b3f93bb447efeadf41707ec..e9758969fbe60d791bf3c3bba000462a5b76aaa5 100644 (file)
@@ -83,7 +83,7 @@ static int vcn_v2_5_early_init(void *handle)
        } else {
                u32 harvest;
                int i;
-               adev->vcn.num_vcn_inst = VCN25_MAX_HW_INSTANCES_ARCTURUS;
+
                for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
                        harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
                        if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
index ef36ee0f3a5e20ab2b0aa19795c232989aec16a0..a81d834ea0d3c57cc622181cf82a4a21c4b896cf 100644 (file)
@@ -98,7 +98,6 @@ static int vcn_v3_0_early_init(void *handle)
                if (adev->ip_versions[UVD_HWIP] == IP_VERSION(3, 0, 0)) {
                        u32 harvest;
 
-                       adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
                        for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
                                harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);
                                if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)
@@ -109,8 +108,7 @@ static int vcn_v3_0_early_init(void *handle)
                                                AMDGPU_VCN_HARVEST_VCN1))
                                /* both instances are harvested, disable the block */
                                return -ENOENT;
-               } else
-                       adev->vcn.num_vcn_inst = 1;
+               }
 
                if (adev->ip_versions[UVD_HWIP] == IP_VERSION(3, 0, 33))
                        adev->vcn.num_enc_rings = 0;