clk: at91: clk-sam9x60-pll: fix return value check
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Mon, 27 Feb 2023 10:59:31 +0000 (12:59 +0200)
committerStephen Boyd <sboyd@kernel.org>
Mon, 6 Mar 2023 20:30:01 +0000 (12:30 -0800)
sam9x60_frac_pll_compute_mul_frac() can't return zero. Remove the check
against zero to reflect this.

Fixes: 43b1bb4a9b3e ("clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs")
Reported-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230227105931.2812412-1-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/at91/clk-sam9x60-pll.c

index d757003004cbb22e474e58283f037f6b0ba31c41..0882ed01d5c27fd1a693ff5a197584fc5009736e 100644 (file)
@@ -668,7 +668,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
 
                ret = sam9x60_frac_pll_compute_mul_frac(&frac->core, FCORE_MIN,
                                                        parent_rate, true);
-               if (ret <= 0) {
+               if (ret < 0) {
                        hw = ERR_PTR(ret);
                        goto free;
                }